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| author | serpilliere <serpilliere@users.noreply.github.com> | 2018-11-15 16:42:44 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-11-15 16:42:44 +0100 |
| commit | d9cd503dde4056b728d38b7b22cff2b0b691366c (patch) | |
| tree | 4b5b48ba9eeef3fcdf53763940f5ac2b84483649 /miasm2/arch/x86/sem.py | |
| parent | 0f2f1b094b663caa4df3a375858e4a93df0227d0 (diff) | |
| parent | f72a592a657adf4a90ec3faeff499bf331d704c8 (diff) | |
| download | miasm-d9cd503dde4056b728d38b7b22cff2b0b691366c.tar.gz miasm-d9cd503dde4056b728d38b7b22cff2b0b691366c.zip | |
Merge pull request #882 from w4kfu/revert-879-mov_assignexpr_rot_shift
Revert 879 mov assignexpr rot shift ; Simplify assignexpr rot shift & patch simplification
Diffstat (limited to '')
| -rw-r--r-- | miasm2/arch/x86/sem.py | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index 565f7571..c0b578f6 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -636,9 +636,7 @@ def _rotate_tpl(ir, instr, dst, src, op, left=False): m2_expr.ExprAssign(of, new_of), m2_expr.ExprAssign(dst, res) ] - e = [] - if dst.size == 32 and dst in replace_regs[64]: - e.append(m2_expr.ExprAssign(dst[:dst.size], dst)) + e = [m2_expr.ExprAssign(dst, dst)] # Don't generate conditional shifter on constant if isinstance(shifter, m2_expr.ExprInt): if int(shifter) != 0: @@ -686,9 +684,7 @@ def rotate_with_carry_tpl(ir, instr, op, dst, src): m2_expr.ExprAssign(of, new_of), m2_expr.ExprAssign(dst, new_dst) ] - e = [] - if dst.size == 32 and dst in replace_regs[64]: - e.append(m2_expr.ExprAssign(dst[:dst.size], dst)) + e = [m2_expr.ExprAssign(dst, dst)] # Don't generate conditional shifter on constant if isinstance(shifter, m2_expr.ExprInt): if int(shifter) != 0: @@ -774,9 +770,7 @@ def _shift_tpl(op, ir, instr, a, b, c=None, op_inv=None, left=False, m2_expr.ExprAssign(a, res), ] e_do += update_flag_znp(res) - e = [] - if a.size == 32 and a in replace_regs[64]: - e.append(m2_expr.ExprAssign(a[:a.size], a)) + e = [m2_expr.ExprAssign(a, a)] # Don't generate conditional shifter on constant if isinstance(shifter, m2_expr.ExprInt): if int(shifter) != 0: @@ -5652,7 +5646,6 @@ class ir_x86_16(IntermediateRepresentation): instr_ir, extra_ir = mnemo_func[ instr.name.lower()](self, instr, *args) - self.mod_pc(instr, instr_ir, extra_ir) instr.additional_info.except_on_instr = False if instr.additional_info.g1.value & 6 == 0 or \ |