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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2016-01-29 11:27:17 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2016-01-30 12:02:37 +0100 |
| commit | a9ad6d3a1fdc0084aec37e27e472ceaee7f49ddd (patch) | |
| tree | 2522418f5f8fe4af06d09db25d641ab2815a434b /miasm2/arch/x86/sem.py | |
| parent | 4a6be2448f98ab854d8524e95b188b1072bb04dc (diff) | |
| download | miasm-a9ad6d3a1fdc0084aec37e27e472ceaee7f49ddd.tar.gz miasm-a9ad6d3a1fdc0084aec37e27e472ceaee7f49ddd.zip | |
X86/sem: fix RET arg size
Diffstat (limited to 'miasm2/arch/x86/sem.py')
| -rw-r--r-- | miasm2/arch/x86/sem.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index d1a535f1..c1caa905 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -1218,7 +1218,7 @@ def ret(ir, instr, a=None): a = m2_expr.ExprInt(0, s) value = (myesp + (m2_expr.ExprInt((s / 8), s))) else: - a = a.zeroExtend(s) + a = m2_expr.ExprInt(int(a.arg), s) value = (myesp + (m2_expr.ExprInt((s / 8), s) + a)) e.append(m2_expr.ExprAff(myesp, value)) |