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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-08-21 08:27:40 +0200 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-08-23 09:35:27 +0200 |
| commit | 253547e35343aed844e7bcb033c610409fcbd21e (patch) | |
| tree | f57b90520b3c06edc8483979795d3de2e9a54d26 /miasm2/core/cpu.py | |
| parent | 46bb6b39453ea8b5abb04dfd62492e429376a8ea (diff) | |
| download | miasm-253547e35343aed844e7bcb033c610409fcbd21e.tar.gz miasm-253547e35343aed844e7bcb033c610409fcbd21e.zip | |
Code cleaning: lgtm.com
Diffstat (limited to 'miasm2/core/cpu.py')
| -rw-r--r-- | miasm2/core/cpu.py | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/miasm2/core/cpu.py b/miasm2/core/cpu.py index 686e12ba..bd30e0f8 100644 --- a/miasm2/core/cpu.py +++ b/miasm2/core/cpu.py @@ -135,7 +135,6 @@ class reg_info_dct(object): def gen_reg(reg_name, sz=32): """Gen reg expr and parser""" - reg_name_lower = reg_name.lower() reg = m2_expr.ExprId(reg_name, sz) reginfo = reg_info([reg_name], [reg]) return reg, reginfo @@ -149,7 +148,6 @@ def gen_reg_bs(reg_name, reg_info, base_cls): bs_reg_name = bs(l=0, cls=(bs_reg_name,)) """ - reg_name_lower = reg_name.lower() bs_name = "bs_%s" % reg_name cls = type(bs_name, base_cls, {'reg': reg_info}) |