Merge pull request #492 from serpilliere/fix_mem_accesses

Fix mem accesses

1 files changed, 14 insertions, 2 deletions

diff --git a/miasm2/expression/expression.py b/miasm2/expression/expression.py
index ef7fa1f6..e134e503 100644
--- a/miasm2/expression/expression.py
+++ b/miasm2/expression/expression.py
@@ -377,6 +377,13 @@ class Expr(object):
     def is_compose(self):
         return False
 
+    def is_op_segm(self):
+        """Returns True if is ExprOp and op == 'segm'"""
+        return False
+
+    def is_mem_segm(self):
+        """Returns True if is ExprMem and ptr is_op_segm"""
+        return False
 
 class ExprInt(Expr):
 
@@ -817,8 +824,9 @@ class ExprMem(Expr):
         arg = self.arg.copy()
         return ExprMem(arg, size=self.size)
 
-    def is_op_segm(self):
-        return isinstance(self.__arg, ExprOp) and self.__arg.op == 'segm'
+    def is_mem_segm(self):
+        """Returns True if is ExprMem and ptr is_op_segm"""
+        return self.__arg.is_op_segm()
 
     def depth(self):
         return self.__arg.depth() + 1
@@ -1002,6 +1010,10 @@ class ExprOp(Expr):
             return True
         return self.op == op
 
+    def is_op_segm(self):
+        """Returns True if is ExprOp and op == 'segm'"""
+        return self.is_op('segm')
+
 class ExprSlice(Expr):
 
     __slots__ = Expr.__slots__ + ["__arg", "__start", "__stop"]