Modify irbloc destination mecanism. Rework API in consequence.

Fat patch here: some API have changed.

Each irbloc now affects a special "IRDst" register which is used to
describe the destination irbloc. It allows simple description of
architectures using delay slots. Architectures semantic and tcc/python
jitter are modified in consequence. LLVM jitter is disabled for now,
but should be patch soon.

1 files changed, 10 insertions, 0 deletions

diff --git a/miasm2/jitter/arch/JitCore.c b/miasm2/jitter/arch/JitCore.c
new file mode 100644
index 00000000..739beb74
--- /dev/null
+++ b/miasm2/jitter/arch/JitCore.c
@@ -0,0 +1,10 @@
+#include <Python.h>
+#include "JitCore.h"
+
+block_id Resolve_dst(uint64_t addr, uint64_t is_local)
+{
+	block_id b;
+	b.address = addr;
+	b.is_local = is_local;
+	return b;
+}