Modify irbloc destination mecanism. Rework API in consequence.

Fat patch here: some API have changed.

Each irbloc now affects a special "IRDst" register which is used to
describe the destination irbloc. It allows simple description of
architectures using delay slots. Architectures semantic and tcc/python
jitter are modified in consequence. LLVM jitter is disabled for now,
but should be patch soon.

1 files changed, 7 insertions, 0 deletions

diff --git a/miasm2/jitter/arch/JitCore.h b/miasm2/jitter/arch/JitCore.h
index 2686cb46..723a10cc 100644
--- a/miasm2/jitter/arch/JitCore.h
+++ b/miasm2/jitter/arch/JitCore.h
@@ -64,3 +64,10 @@
 		return 0;						\
 	}
 
+
+typedef struct {
+	uint8_t is_local;
+	uint64_t address;
+} block_id;
+
+block_id Resolve_dst(uint64_t addr, uint64_t is_local);