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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-03-11 18:48:52 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-04-18 09:54:48 +0200 |
| commit | a2b330daa00cb3747d2b426a68bb5015fbf466c2 (patch) | |
| tree | fcfad466bc034cd018f10b40e7ef89d6ff15095b /miasm2/jitter/arch/JitCore_arm.c | |
| parent | 94acdee558688cabd85fc7f4beb216e73ecabfbd (diff) | |
| download | miasm-a2b330daa00cb3747d2b426a68bb5015fbf466c2.tar.gz miasm-a2b330daa00cb3747d2b426a68bb5015fbf466c2.zip | |
Arm: add armt jitter
Diffstat (limited to 'miasm2/jitter/arch/JitCore_arm.c')
| -rw-r--r-- | miasm2/jitter/arch/JitCore_arm.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/miasm2/jitter/arch/JitCore_arm.c b/miasm2/jitter/arch/JitCore_arm.c index 93fab030..cce0997d 100644 --- a/miasm2/jitter/arch/JitCore_arm.c +++ b/miasm2/jitter/arch/JitCore_arm.c @@ -186,6 +186,16 @@ void check_automod(JitCpu* jitcpu, uint64_t addr, uint64_t size) } + +UDIV(32) + +UMOD(32) + +IDIV(32) + +IMOD(32) + + void MEM_WRITE_08(JitCpu* jitcpu, uint64_t addr, uint8_t src) { vm_MEM_WRITE_08(&((VmMngr*)jitcpu->pyvm)->vm_mngr, addr, src); |