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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2014-09-05 11:30:05 +0200 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2014-09-05 11:30:05 +0200 |
| commit | 6e09df71a333bf87cd68c2d08ad068a3e501462d (patch) | |
| tree | 7d76e0626e61ef5a9f15c62358337674fb0095aa /miasm2/jitter/arch/JitCore_mips32.h | |
| parent | e8d0fcf8d28d82a8f33138d044f335634ac3a30c (diff) | |
| download | miasm-6e09df71a333bf87cd68c2d08ad068a3e501462d.tar.gz miasm-6e09df71a333bf87cd68c2d08ad068a3e501462d.zip | |
Modify irbloc destination mecanism. Rework API in consequence.
Fat patch here: some API have changed. Each irbloc now affects a special "IRDst" register which is used to describe the destination irbloc. It allows simple description of architectures using delay slots. Architectures semantic and tcc/python jitter are modified in consequence. LLVM jitter is disabled for now, but should be patch soon.
Diffstat (limited to 'miasm2/jitter/arch/JitCore_mips32.h')
| -rw-r--r-- | miasm2/jitter/arch/JitCore_mips32.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/miasm2/jitter/arch/JitCore_mips32.h b/miasm2/jitter/arch/JitCore_mips32.h index 65666d88..ac128250 100644 --- a/miasm2/jitter/arch/JitCore_mips32.h +++ b/miasm2/jitter/arch/JitCore_mips32.h @@ -239,5 +239,5 @@ typedef struct { }vm_cpu_t; - -#define RETURN_PC return PyLong_FromUnsignedLongLong(vmcpu->PC); +//#define RETURN_PC return PyLong_FromUnsignedLongLong(vmcpu->PC); +#define RETURN_PC return BlockDst; |