diff options
| author | Camille Mougey <commial@gmail.com> | 2017-05-16 17:40:49 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-05-16 17:40:49 +0200 |
| commit | d3e5587207f68763ea483c0deeef160b3ebec155 (patch) | |
| tree | 51580d83ad4a574350975494d577fcc7b1fbcf7f /miasm2/jitter/codegen.py | |
| parent | 627669759b4bdcfb220f098a141c183621477cd6 (diff) | |
| parent | 09f7c519d4c3249736a16ce36be9b6c3f135d6a8 (diff) | |
| download | miasm-d3e5587207f68763ea483c0deeef160b3ebec155.tar.gz miasm-d3e5587207f68763ea483c0deeef160b3ebec155.zip | |
Merge pull request #551 from serpilliere/instr_except
IR: explicit exception for div
Diffstat (limited to 'miasm2/jitter/codegen.py')
| -rw-r--r-- | miasm2/jitter/codegen.py | 20 |
1 files changed, 1 insertions, 19 deletions
diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py index b2398dd2..15f172ee 100644 --- a/miasm2/jitter/codegen.py +++ b/miasm2/jitter/codegen.py @@ -25,7 +25,6 @@ class Attributes(object): self.mem_read = False self.mem_write = False self.set_exception = False - self.op_set_exception = False self.log_mn = log_mn self.log_regs = log_regs self.instr = None @@ -36,8 +35,6 @@ class CGen(object): Helper to generate C code for a given AsmBlock """ - IMPLICIT_EXCEPTION_OP = set(['umod', 'udiv']) - """ Translate native assembly block to C """ @@ -325,7 +322,7 @@ class CGen(object): out = [] if attrib.mem_read | attrib.mem_write: out += (self.CODE_VM_EXCEPTION_POST_INSTR % (self.C_PC)).split('\n') - if attrib.set_exception or attrib.op_set_exception: + if attrib.set_exception: out += (self.CODE_CPU_EXCEPTION_POST_INSTR % (self.C_PC)).split('\n') if attrib.mem_read | attrib.mem_write: @@ -437,10 +434,6 @@ class CGen(object): if c_prefetch: out += self.gen_check_memory_exception(attrib.instr.offset) - # Check if operator raised exception flags - if attrib.op_set_exception: - out += self.gen_check_cpu_exception(attrib.instr.offset) - out.append("// Mem updt") out += c_mem @@ -462,12 +455,6 @@ class CGen(object): return out - def is_exception_operator(self, operator): - """Return True if the @op operator can raise a runtime exception""" - - return any(operator.startswith(except_op) - for except_op in self.IMPLICIT_EXCEPTION_OP) - def get_caracteristics(self, assignblk, attrib): """ Set the carateristics in @attrib according to the @assignblk @@ -479,10 +466,6 @@ class CGen(object): attrib.set_exception = self.ir_arch.arch.regs.exception_flags in assignblk element_read = assignblk.get_r(mem_read=True) - # Check implicit exception raising - attrib.op_set_exception = any(self.is_exception_operator(operator) - for elem in assignblk.values() - for operator in m2_expr.get_expr_ops(elem)) # Check mem read attrib.mem_read = any(isinstance(expr, m2_expr.ExprMem) for expr in element_read) @@ -513,7 +496,6 @@ class CGen(object): attrib.instr = instr instr_attrib.mem_read |= attrib.mem_read instr_attrib.mem_write |= attrib.mem_write - instr_attrib.op_set_exception |= attrib.op_set_exception instr_attrib.set_exception |= attrib.set_exception return instr_attrib, irblocks_attributes |