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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2016-07-11 10:22:33 +0200 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2016-08-30 13:54:11 +0200 |
| commit | dc2728ba627e108bf7b618161be4368a43b2d59a (patch) | |
| tree | 512f52519b066154392e65384bdeeacf47f5cbef /miasm2/jitter/codegen.py | |
| parent | a5e64ddb5630be1fecf8878a0f5a10855c27ac63 (diff) | |
| download | miasm-dc2728ba627e108bf7b618161be4368a43b2d59a.tar.gz miasm-dc2728ba627e108bf7b618161be4368a43b2d59a.zip | |
Jitter: support sparse write
Diffstat (limited to 'miasm2/jitter/codegen.py')
| -rw-r--r-- | miasm2/jitter/codegen.py | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py index 7bdbf890..068839e7 100644 --- a/miasm2/jitter/codegen.py +++ b/miasm2/jitter/codegen.py @@ -331,6 +331,9 @@ class CGen(object): if attrib.set_exception or attrib.op_set_exception: out += (self.CODE_CPU_EXCEPTION_POST_INSTR % (self.C_PC, dst)).split('\n') + if attrib.mem_read | attrib.mem_write: + out.append("reset_code_bloc_write(&((VmMngr*)jitcpu->pyvm)->vm_mngr);") + return out def gen_pre_code(self, attrib): |