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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-03-11 18:48:52 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-04-18 09:54:48 +0200 |
| commit | a2b330daa00cb3747d2b426a68bb5015fbf466c2 (patch) | |
| tree | fcfad466bc034cd018f10b40e7ef89d6ff15095b /miasm2/jitter/llvmconvert.py | |
| parent | 94acdee558688cabd85fc7f4beb216e73ecabfbd (diff) | |
| download | miasm-a2b330daa00cb3747d2b426a68bb5015fbf466c2.tar.gz miasm-a2b330daa00cb3747d2b426a68bb5015fbf466c2.zip | |
Arm: add armt jitter
Diffstat (limited to '')
| -rw-r--r-- | miasm2/jitter/llvmconvert.py | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py index 0e4368a8..35db1538 100644 --- a/miasm2/jitter/llvmconvert.py +++ b/miasm2/jitter/llvmconvert.py @@ -180,6 +180,10 @@ class LLVMContext_JIT(LLVMContext): from miasm2.arch.mips32.jit import mipsCGen self.cgen_class = mipsCGen self.has_delayslot = True + elif arch.name == "arm": + from miasm2.arch.arm.jit import arm_CGen + self.cgen_class = arm_CGen + self.has_delayslot = False else: self.cgen_class = CGen self.has_delayslot = False |