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| author | Camille Mougey <commial@gmail.com> | 2017-06-06 12:24:31 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-06-06 12:24:31 +0200 |
| commit | 443a811aa92a31d3c2ae89937c5abb497bcc30ff (patch) | |
| tree | 70937e30d5475f1c0b137ffc343e312323c50970 /miasm2/jitter/llvmconvert.py | |
| parent | b772f2d9c7aceb7d1ca87cdefd708d4f65d71623 (diff) | |
| parent | ded504718e83ffcc63ef42cc27159ef998ed211b (diff) | |
| download | miasm-443a811aa92a31d3c2ae89937c5abb497bcc30ff.tar.gz miasm-443a811aa92a31d3c2ae89937c5abb497bcc30ff.zip | |
Merge pull request #522 from serpilliere/ir_ro
Ir ro
Diffstat (limited to 'miasm2/jitter/llvmconvert.py')
| -rw-r--r-- | miasm2/jitter/llvmconvert.py | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py index ae018c18..ed55aff8 100644 --- a/miasm2/jitter/llvmconvert.py +++ b/miasm2/jitter/llvmconvert.py @@ -1299,7 +1299,8 @@ class LLVMFunction(): for instr, irblocks in zip(asmblock.lines, irblocks_list): - instr_attrib, irblocks_attributes = codegen.get_attributes(instr, irblocks, self.log_mn, + instr_attrib, irblocks_attributes = codegen.get_attributes(instr, irblocks, + self.log_mn, self.log_regs) # Pre-create basic blocks @@ -1308,16 +1309,16 @@ class LLVMFunction(): # Generate the corresponding code for index, irblock in enumerate(irblocks): - self.llvm_context.ir_arch.irbloc_fix_regs_for_mode( + new_irblock = self.llvm_context.ir_arch.irbloc_fix_regs_for_mode( irblock, self.llvm_context.ir_arch.attrib) # Set the builder at the begining of the correct bbl - name = self.canonize_label_name(irblock.label) + name = self.canonize_label_name(new_irblock.label) self.builder.position_at_end(self.get_basic_bloc_by_label(name)) if index == 0: self.gen_pre_code(instr_attrib) - self.gen_irblock(instr_attrib, irblocks_attributes[index], instr_offsets, irblock) + self.gen_irblock(instr_attrib, irblocks_attributes[index], instr_offsets, new_irblock) # Gen finalize (see codegen::CGen) is unrecheable, except with delayslot self.gen_finalize(asmblock, codegen) |