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| author | Camille Mougey <commial@gmail.com> | 2015-08-10 16:10:55 +0200 |
|---|---|---|
| committer | Camille Mougey <commial@gmail.com> | 2015-08-10 16:10:55 +0200 |
| commit | bd47054b59077cc6b0aa91b3a542bc5bf2c12ff8 (patch) | |
| tree | f75283277ee1ec555a37dd817c41bb695092370f /miasm2/jitter/vm_mngr.h | |
| parent | dcc488ec39d9a96b70c728ccdbcd43e62b25ae99 (diff) | |
| parent | 6c9e46d8d2c2f0b34f025ec2381015bbfa9eb34e (diff) | |
| download | miasm-bd47054b59077cc6b0aa91b3a542bc5bf2c12ff8.tar.gz miasm-bd47054b59077cc6b0aa91b3a542bc5bf2c12ff8.zip | |
Merge pull request #206 from serpilliere/aarch64
Aarch64
Diffstat (limited to 'miasm2/jitter/vm_mngr.h')
| -rw-r--r-- | miasm2/jitter/vm_mngr.h | 55 |
1 files changed, 54 insertions, 1 deletions
diff --git a/miasm2/jitter/vm_mngr.h b/miasm2/jitter/vm_mngr.h index fc346cc5..c93ed583 100644 --- a/miasm2/jitter/vm_mngr.h +++ b/miasm2/jitter/vm_mngr.h @@ -205,10 +205,63 @@ unsigned int umul16_hi(unsigned short a, unsigned short b); unsigned int div_op(unsigned int size, unsigned int a, unsigned int b, unsigned int c); unsigned int rem_op(unsigned int size, unsigned int a, unsigned int b, unsigned int c); uint64_t rot_left(uint64_t size, uint64_t a, uint64_t b); -unsigned int rot_right(unsigned int size, unsigned int a, unsigned int b); +uint64_t rot_right(uint64_t size, uint64_t a, uint64_t b); int rcl_rez_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf); int rcl_cf_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf); + +#define UDIV(sizeA) \ + uint ## sizeA ## _t udiv ## sizeA (vm_cpu_t* vmcpu, uint ## sizeA ## _t a, uint ## sizeA ## _t b) \ + { \ + uint ## sizeA ## _t r; \ + if (b == 0) { \ + vmcpu->exception_flags |= EXCEPT_INT_DIV_BY_ZERO; \ + return 0; \ + } \ + r = a/b; \ + return r; \ + } + + +#define UMOD(sizeA) \ + uint ## sizeA ## _t umod ## sizeA (vm_cpu_t* vmcpu, uint ## sizeA ## _t a, uint ## sizeA ## _t b) \ + { \ + uint ## sizeA ## _t r; \ + if (b == 0) { \ + vmcpu->exception_flags |= EXCEPT_INT_DIV_BY_ZERO; \ + return 0; \ + } \ + r = a%b; \ + return r; \ + } + + +#define IDIV(sizeA) \ + int ## sizeA ## _t idiv ## sizeA (vm_cpu_t* vmcpu, int ## sizeA ## _t a, int ## sizeA ## _t b) \ + { \ + int ## sizeA ## _t r; \ + if (b == 0) { \ + vmcpu->exception_flags |= EXCEPT_INT_DIV_BY_ZERO; \ + return 0; \ + } \ + r = a/b; \ + return r; \ + } + + +#define IMOD(sizeA) \ + int ## sizeA ## _t imod ## sizeA (vm_cpu_t* vmcpu, int ## sizeA ## _t a, int ## sizeA ## _t b) \ + { \ + int ## sizeA ## _t r; \ + if (b == 0) { \ + vmcpu->exception_flags |= EXCEPT_INT_DIV_BY_ZERO; \ + return 0; \ + } \ + r = a%b; \ + return r; \ + } + + //PyObject* _vm_push_uint32_t(PyObject *item); //PyObject* _vm_pop_uint32_t(void); ////PyObject* _vm_put_str(PyObject *item); |