All: rename vars bloc -> block

11 files changed, 107 insertions, 147 deletions

diff --git a/miasm2/analysis/data_analysis.py b/miasm2/analysis/data_analysis.py
index 8703c0cd..c67c4509 100644
--- a/miasm2/analysis/data_analysis.py
+++ b/miasm2/analysis/data_analysis.py
@@ -211,8 +211,8 @@ class symb_exec_func:
 
     """
     This algorithm will do symbolic execution on a function, trying to propagate
-    states between basic blocs in order to extract inter-blocs dataflow. The
-    algorithm tries to merge states from blocs with multiple parents.
+    states between basic blocks in order to extract inter-blocs dataflow. The
+    algorithm tries to merge states from blocks with multiple parents.
 
     There is no real magic here, loops and complex merging will certainly fail.
     """
diff --git a/miasm2/analysis/disasm_cb.py b/miasm2/analysis/disasm_cb.py
index e2fa54cf..95a2b49b 100644
--- a/miasm2/analysis/disasm_cb.py
+++ b/miasm2/analysis/disasm_cb.py
@@ -34,12 +34,12 @@ def arm_guess_subcall(
     ir_blocks = ir_arch.blocks.values()
     # flow_graph = DiGraph()
     to_add = set()
-    for irb in ir_blocs:
+    for irblock in ir_blocks:
         # print 'X'*40
-        # print irb
+        # print irblock
         pc_val = None
         lr_val = None
-        for exprs in irb.irs:
+        for exprs in irblock.irs:
             for e in exprs:
                 if e.dst == ir_arch.pc:
                     pc_val = e.src
@@ -81,10 +81,10 @@ def arm_guess_jump_table(
     ir_blocks = ir_arch.blocks.values()
     for irblock in ir_blocks:
         # print 'X'*40
-        # print irb
+        # print irblock
         pc_val = None
         # lr_val = None
-        for exprs in irb.irs:
+        for exprs in irblock.irs:
             for e in exprs:
                 if e.dst == ir_arch.pc:
                     pc_val = e.src
diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py
index 1d2ff4f1..792a4984 100644
--- a/miasm2/arch/aarch64/sem.py
+++ b/miasm2/arch/aarch64/sem.py
@@ -804,8 +804,8 @@ class ir_aarch64l(IntermediateRepresentation):
                 dst = dst.replace_expr({self.pc: cur_offset})
             src = src.replace_expr({self.pc: cur_offset})
             instr_ir[i] = m2_expr.ExprAff(dst, src)
-        for b in extra_ir:
-            for irs in b.irs:
+        for irblock in extra_ir:
+            for irs in irblock.irs:
                 for i, expr in enumerate(irs):
                     dst, src = expr.dst, expr.src
                     if dst != self.pc:
@@ -819,9 +819,9 @@ class ir_aarch64l(IntermediateRepresentation):
         regs_to_fix = [WZR, XZR]
         instr_ir = [expr for expr in instr_ir if expr.dst not in regs_to_fix]
 
-        for b in extra_ir:
-            for i, irs in enumerate(b.irs):
-                b.irs[i] = [expr for expr in irs if expr.dst not in regs_to_fix]
+        for irblock in extra_ir:
+            for i, irs in enumerate(irblock.irs):
+                irblock.irs[i] = [expr for expr in irs if expr.dst not in regs_to_fix]
 
         return instr_ir, extra_ir
 
diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py
index 0ec02907..8c74aa76 100644
--- a/miasm2/arch/arm/sem.py
+++ b/miasm2/arch/arm/sem.py
@@ -1252,8 +1252,8 @@ class ir_arml(IntermediateRepresentation):
             x = ExprAff(x.dst, x.src.replace_expr(
                 {self.pc: ExprInt32(instr.offset + 8)}))
             instr_ir[i] = x
-        for b in extra_ir:
-            for irs in b.irs:
+        for irblock in extra_ir:
+            for irs in irblock.irs:
                 for i, x in enumerate(irs):
                     x = ExprAff(x.dst, x.src.replace_expr(
                         {self.pc: ExprInt32(instr.offset + 8)}))
diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py
index cf760307..d982f033 100644
--- a/miasm2/arch/mips32/sem.py
+++ b/miasm2/arch/mips32/sem.py
@@ -445,8 +445,8 @@ class ir_mips32l(IntermediateRepresentation):
             x = m2_expr.ExprAff(x.dst, x.src.replace_expr(
                 {self.pc: m2_expr.ExprInt32(instr.offset + 4)}))
             instr_ir[i] = x
-        for b in extra_ir:
-            for irs in b.irs:
+        for irblock in extra_ir:
+            for irs in irblock.irs:
                 for i, x in enumerate(irs):
                     x = m2_expr.ExprAff(x.dst, x.src.replace_expr(
                         {self.pc: m2_expr.ExprInt32(instr.offset + 4)}))
@@ -454,49 +454,10 @@ class ir_mips32l(IntermediateRepresentation):
         return instr_ir, extra_ir
 
     def get_next_instr(self, instr):
-        l = self.symbol_pool.getby_offset_create(instr.offset  + 4)
-        return l
+        return self.symbol_pool.getby_offset_create(instr.offset  + 4)
 
     def get_next_break_label(self, instr):
-        l = self.symbol_pool.getby_offset_create(instr.offset  + 8)
-        return l
-    """
-    def add_bloc(self, bloc, gen_pc_updt = False):
-        c = None
-        ir_blocs_all = []
-        for l in bloc.lines:
-            if c is None:
-                # print 'new c'
-                label = self.get_label(l)
-                c = IRBlock(label, [], [])
-                ir_blocs_all.append(c)
-                bloc_dst = None
-            # print 'Translate', l
-            dst, ir_bloc_cur, ir_blocs_extra = self.instr2ir(l)
-            # print ir_bloc_cur
-            # for xxx in ir_bloc_cur:
-            #    print "\t", xxx
-            assert((dst is None) or (bloc_dst is None))
-            bloc_dst = dst
-            #if bloc_dst is not None:
-            #    c.dst = bloc_dst
-            if dst is not None:
-                ir_bloc_cur.append(m2_expr.ExprAff(PC_FETCH, dst))
-                c.dst = PC_FETCH
-            if gen_pc_updt is not False:
-                self.gen_pc_update(c, l)
-
-            c.irs.append(ir_bloc_cur)
-            c.lines.append(l)
-            if ir_blocs_extra:
-                # print 'split'
-                for b in ir_blocs_extra:
-                    b.lines = [l] * len(b.irs)
-                ir_blocs_all += ir_blocs_extra
-                c = None
-        self.post_add_bloc(bloc, ir_blocs_all)
-        return ir_blocs_all
-    """
+        return self.symbol_pool.getby_offset_create(instr.offset  + 8)
 
 class ir_mips32b(ir_mips32l):
     def __init__(self, symbol_pool=None):
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py
index 24b9487a..729806b5 100644
--- a/miasm2/arch/x86/sem.py
+++ b/miasm2/arch/x86/sem.py
@@ -4571,8 +4571,8 @@ class ir_x86_16(IntermediateRepresentation):
         lbl_skip = m2_expr.ExprId(self.get_next_label(instr), self.IRDst.size)
         lbl_next = m2_expr.ExprId(self.get_next_label(instr), self.IRDst.size)
 
-        for b in extra_ir:
-            for ir in b.irs:
+        for irblock in extra_ir:
+            for ir in irblock.irs:
                 for i, e in enumerate(ir):
                     src = e.src.replace_expr({lbl_next: lbl_end})
                     ir[i] = m2_expr.ExprAff(e.dst, src)
@@ -4656,8 +4656,8 @@ class ir_x86_64(ir_x86_16):
             src = src.replace_expr(
                 {self.pc: m2_expr.ExprInt64(instr.offset + instr.l)})
             instr_ir[i] = m2_expr.ExprAff(dst, src)
-        for b in extra_ir:
-            for irs in b.irs:
+        for irblock in extra_ir:
+            for irs in irblock.irs:
                 for i, expr in enumerate(irs):
                     dst, src = expr.dst, expr.src
                     if dst != self.pc:
diff --git a/miasm2/ir/analysis.py b/miasm2/ir/analysis.py
index 6eb226ed..4f7b321f 100644
--- a/miasm2/ir/analysis.py
+++ b/miasm2/ir/analysis.py
@@ -167,7 +167,7 @@ class ira(IntermediateRepresentation):
         for irblock in self.blocks.values():
             modified |= self.remove_dead_instr(irblock, useful)
             # Remove useless structures
-            for assignblk in block.irs:
+            for assignblk in irblock.irs:
                 del assignblk._cur_kill
                 del assignblk._prev_kill
                 del assignblk._cur_reach
@@ -291,7 +291,7 @@ class ira(IntermediateRepresentation):
         Source : Kennedy, K. (1979). A survey of data flow analysis techniques.
         IBM Thomas J. Watson Research Division, page 43
         """
-        # Update r/w variables for all irblocs
+        # Update r/w variables for all irblocks
         self.get_rw(self.ira_regs_ids())
         # Liveness step
         self.compute_reach()
diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py
index a7076e2a..7f1b00d6 100644
--- a/miasm2/ir/ir.py
+++ b/miasm2/ir/ir.py
@@ -431,7 +431,7 @@ class IntermediateRepresentation(object):
         if irb_cur is None:
             return None
 
-        assignblk, ir_blocs_extra = self.instr2ir(instr)
+        assignblk, ir_blocks_extra = self.instr2ir(instr)
 
         if gen_pc_updt is not False:
             self.gen_pc_update(irb_cur, instr)
@@ -439,10 +439,10 @@ class IntermediateRepresentation(object):
         irb_cur.irs.append(assignblk)
         irb_cur.lines.append(instr)
 
-        if ir_blocs_extra:
-            for b in ir_blocs_extra:
-                b.lines = [instr] * len(b.irs)
-            ir_blocks_all += ir_blocs_extra
+        if ir_blocks_extra:
+            for irblock in ir_blocks_extra:
+                irblock.lines = [instr] * len(irblock.irs)
+            ir_blocks_all += ir_blocks_extra
             irb_cur = None
         return irb_cur
 
@@ -482,22 +482,22 @@ class IntermediateRepresentation(object):
                     return ir
         return None
 
-    def set_empty_dst_to_next(self, bloc, ir_blocs):
-        for b in ir_blocs:
-            if b.dst is not None:
+    def set_empty_dst_to_next(self, block, ir_blocks):
+        for irblock in ir_blocks:
+            if irblock.dst is not None:
                 continue
-            next_lbl = bloc.get_next()
+            next_lbl = block.get_next()
             if next_lbl is None:
-                dst = m2_expr.ExprId(self.get_next_label(bloc.lines[-1]),
+                dst = m2_expr.ExprId(self.get_next_label(block.lines[-1]),
                                      self.pc.size)
             else:
                 dst = m2_expr.ExprId(next_lbl,
                                      self.pc.size)
-            b.irs.append(AssignBlock([m2_expr.ExprAff(self.IRDst, dst)]))
-            b.lines.append(b.lines[-1])
+            irblock.irs.append(AssignBlock([m2_expr.ExprAff(self.IRDst, dst)]))
+            irblock.lines.append(irblock.lines[-1])
 
-    def post_add_bloc(self, bloc, ir_blocs):
-        self.set_empty_dst_to_next(bloc, ir_blocs)
+    def post_add_bloc(self, block, ir_blocks):
+        self.set_empty_dst_to_next(block, ir_blocks)
 
         for irblock in ir_blocks:
             self.irbloc_fix_regs_for_mode(irblock, self.attrib)
diff --git a/miasm2/jitter/jitcore.py b/miasm2/jitter/jitcore.py
index 651b71e3..60fb3f2c 100644
--- a/miasm2/jitter/jitcore.py
+++ b/miasm2/jitter/jitcore.py
@@ -88,31 +88,31 @@ class JitCore(object):
         "Initialise the Jitter"
         raise NotImplementedError("Abstract class")
 
-    def get_bloc_min_max(self, cur_bloc):
-        "Update cur_bloc to set min/max address"
+    def get_bloc_min_max(self, cur_block):
+        "Update cur_block to set min/max address"
 
-        if cur_bloc.lines:
-            cur_bloc.ad_min = cur_bloc.lines[0].offset
-            cur_bloc.ad_max = cur_bloc.lines[-1].offset + cur_bloc.lines[-1].l
+        if cur_block.lines:
+            cur_block.ad_min = cur_block.lines[0].offset
+            cur_block.ad_max = cur_block.lines[-1].offset + cur_block.lines[-1].l
         else:
             # 1 byte block for unknown mnemonic
-            cur_bloc.ad_min = cur_bloc.label.offset
-            cur_bloc.ad_max = cur_bloc.label.offset+1
+            cur_block.ad_min = cur_block.label.offset
+            cur_block.ad_max = cur_block.label.offset+1
 
 
-    def add_bloc_to_mem_interval(self, vm, bloc):
-        "Update vm to include bloc addresses in its memory range"
+    def add_bloc_to_mem_interval(self, vm, block):
+        "Update vm to include block addresses in its memory range"
 
-        self.blocs_mem_interval += interval([(bloc.ad_min, bloc.ad_max - 1)])
+        self.blocs_mem_interval += interval([(block.ad_min, block.ad_max - 1)])
 
         vm.reset_code_bloc_pool()
         for a, b in self.blocs_mem_interval:
             vm.add_code_bloc(a, b + 1)
 
-    def jitirblocs(self, label, irblocs):
-        """JiT a group of irblocs.
-        @label: the label of the irblocs
-        @irblocs: a gorup of irblocs
+    def jitirblocs(self, label, irblocks):
+        """JiT a group of irblocks.
+        @label: the label of the irblocks
+        @irblocks: a gorup of irblocks
         """
 
         raise NotImplementedError("Abstract class")
@@ -123,16 +123,16 @@ class JitCore(object):
         """
 
         irblocks = self.ir_arch.add_bloc(block, gen_pc_updt = True)
-        b.blocks = irblocks
+        block.blocks = irblocks
         self.jitirblocs(block.label, irblocks)
 
     def disbloc(self, addr, vm):
-        """Disassemble a new bloc and JiT it
+        """Disassemble a new block and JiT it
         @addr: address of the block to disassemble (asm_label or int)
         @vm: VmMngr instance
         """
 
-        # Get the bloc
+        # Get the block
         if isinstance(addr, asmbloc.asm_label):
             addr = addr.offset
 
@@ -143,30 +143,30 @@ class JitCore(object):
 
         # Disassemble it
         try:
-            cur_bloc = self.mdis.dis_bloc(addr)
+            cur_block = self.mdis.dis_bloc(addr)
         except IOError:
             # vm_exception_flag is set
             label = self.ir_arch.symbol_pool.getby_offset_create(addr)
-            cur_bloc = asmbloc.asm_block_bad(label)
+            cur_block = asmbloc.asm_block_bad(label)
 
         # Logging
         if self.log_newbloc:
-            print cur_bloc
+            print cur_block
 
-        # Update label -> bloc
-        self.lbl2bloc[cur_bloc.label] = cur_bloc
+        # Update label -> block
+        self.lbl2bloc[cur_block.label] = cur_block
 
-        # Store min/max bloc address needed in jit automod code
-        self.get_bloc_min_max(cur_bloc)
+        # Store min/max block address needed in jit automod code
+        self.get_bloc_min_max(cur_block)
 
         # JiT it
-        self.add_bloc(cur_bloc)
+        self.add_bloc(cur_block)
 
         # Update jitcode mem range
-        self.add_bloc_to_mem_interval(vm, cur_bloc)
+        self.add_bloc_to_mem_interval(vm, cur_block)
 
     def runbloc(self, cpu, lbl, breakpoints):
-        """Run the bloc starting at lbl.
+        """Run the block starting at lbl.
         @cpu: JitCpu instance
         @lbl: target label
         """
@@ -175,80 +175,79 @@ class JitCore(object):
             lbl = getattr(cpu, self.ir_arch.pc.name)
 
         if not lbl in self.lbl2jitbloc:
-            # Need to JiT the bloc
+            # Need to JiT the block
             self.disbloc(lbl, cpu.vmmngr)
 
-        # Run the bloc and update cpu/vmmngr state
+        # Run the block and update cpu/vmmngr state
         return self.exec_wrapper(lbl, cpu, self.lbl2jitbloc.data, breakpoints,
                                  self.options["max_exec_per_call"])
 
-    def blocs2memrange(self, blocs):
-        """Return an interval instance standing for blocs addresses
-        @blocs: list of asm_bloc instances
+    def blocs2memrange(self, blocks):
+        """Return an interval instance standing for blocks addresses
+        @blocks: list of asm_bloc instances
         """
 
         mem_range = interval()
 
-        for b in blocs:
-            mem_range += interval([(b.ad_min, b.ad_max - 1)])
+        for block in blocks:
+            mem_range += interval([(block.ad_min, block.ad_max - 1)])
 
         return mem_range
 
     def __updt_jitcode_mem_range(self, vm):
-        """Rebuild the VM blocs address memory range
+        """Rebuild the VM blocks address memory range
         @vm: VmMngr instance
         """
 
         # Reset the current pool
         vm.reset_code_bloc_pool()
 
-        # Add blocs in the pool
-        for a, b in self.blocs_mem_interval:
-            vm.add_code_bloc(a, b + 1)
+        # Add blocks in the pool
+        for start, stop in self.blocs_mem_interval:
+            vm.add_code_bloc(start, stop + 1)
 
     def del_bloc_in_range(self, ad1, ad2):
-        """Find and remove jitted bloc in range [ad1, ad2].
-        Return the list of bloc removed.
+        """Find and remove jitted block in range [ad1, ad2].
+        Return the list of block removed.
         @ad1: First address
         @ad2: Last address
         """
 
-        # Find concerned blocs
-        modified_blocs = set()
-        for b in self.lbl2bloc.values():
-            if not b.lines:
+        # Find concerned blocks
+        modified_blocks = set()
+        for block in self.lbl2bloc.values():
+            if not block.lines:
                 continue
-            if b.ad_max <= ad1 or b.ad_min >= ad2:
-                # Bloc not modified
+            if block.ad_max <= ad1 or block.ad_min >= ad2:
+                # Block not modified
                 pass
             else:
-                # Modified blocs
-                modified_blocs.add(b)
+                # Modified blocks
+                modified_blocks.add(block)
 
         # Generate interval to delete
-        del_interval = self.blocs2memrange(modified_blocs)
+        del_interval = self.blocs2memrange(modified_blocks)
 
         # Remove interval from monitored interval list
         self.blocs_mem_interval -= del_interval
 
-        # Remove modified blocs
-        for b in modified_blocs:
+        # Remove modified blocks
+        for block in modified_blocks:
             try:
                 for irblock in block.blocks:
-
-                    # Remove offset -> jitted bloc link
-                    if irbloc.label.offset in self.lbl2jitbloc:
-                        del(self.lbl2jitbloc[irbloc.label.offset])
+                    # Remove offset -> jitted block link
+                    if irblock.label.offset in self.lbl2jitbloc:
+                        del(self.lbl2jitbloc[irblock.label.offset])
 
             except AttributeError:
-                # The bloc has never been translated in IR
-                if b.label.offset in self.lbl2jitbloc:
-                    del(self.lbl2jitbloc[b.label.offset])
+                # The block has never been translated in IR
+                if block.label.offset in self.lbl2jitbloc:
+                    del(self.lbl2jitbloc[block.label.offset])
 
-            # Remove label -> bloc link
-            del(self.lbl2bloc[b.label])
+            # Remove label -> block link
+            del(self.lbl2bloc[block.label])
 
-        return modified_blocs
+        return modified_blocks
 
     def updt_automod_code_range(self, vm, mem_range):
         """Remove jitted code in range @mem_range
diff --git a/miasm2/jitter/jitcore_python.py b/miasm2/jitter/jitcore_python.py
index a8ecc3d6..cbd582ab 100644
--- a/miasm2/jitter/jitcore_python.py
+++ b/miasm2/jitter/jitcore_python.py
@@ -34,10 +34,10 @@ class JitCore_Python(jitcore.JitCore):
         "Preload symbols according to current architecture"
         self.symbexec.reset_regs()
 
-    def jitirblocs(self, label, irblocs):
-        """Create a python function corresponding to an irblocs' group.
-        @label: the label of the irblocs
-        @irblocs: a gorup of irblocs
+    def jitirblocs(self, label, irblocks):
+        """Create a python function corresponding to an irblocks' group.
+        @label: the label of the irblocks
+        @irblocks: a gorup of irblocks
         """
 
         def myfunc(cpu):
@@ -47,7 +47,7 @@ class JitCore_Python(jitcore.JitCore):
             # Get virtual memory handler
             vmmngr = cpu.vmmngr
 
-            # Keep current location in irblocs
+            # Keep current location in irblocks
             cur_label = label
 
             # Required to detect new instructions
@@ -57,15 +57,15 @@ class JitCore_Python(jitcore.JitCore):
             exec_engine = self.symbexec
             expr_simp = exec_engine.expr_simp
 
-            # For each irbloc inside irblocs
+            # For each irbloc inside irblocks
             while True:
 
                 # Get the current bloc
-                for irb in irblocs:
+                for irb in irblocks:
                     if irb.label == cur_label:
                         break
                 else:
-                    raise RuntimeError("Irblocs must end with returning an "
+                    raise RuntimeError("Irblocks must end with returning an "
                                        "ExprInt instance")
 
                 # Refresh CPU values according to @cpu instance
diff --git a/miasm2/jitter/jitload.py b/miasm2/jitter/jitload.py
index eaeae89a..693dd224 100644
--- a/miasm2/jitter/jitload.py
+++ b/miasm2/jitter/jitload.py
@@ -242,7 +242,7 @@ class jitter:
         "Add common exceptions handlers"
 
         def exception_automod(jitter):
-            "Tell the JiT backend to update blocs modified"
+            "Tell the JiT backend to update blocks modified"
 
             self.jit.updt_automod_code(jitter.vm)
             self.vm.set_exception(0)