Replace ExprInt[num](x) -> ExprInt(x, num)

author: Ajax <commial@gmail.com> 2017-03-29 15:44:15 +0200
committer: Ajax <commial@gmail.com> 2017-03-30 16:04:40 +0200
commit: f81c3e4b42d0ce487101b8e0802e43b32b261b1d (patch)
tree: 91fcd0b4317685bc4685acbb17affc3ec0f78afc /miasm2
parent: fd76e24c84825072ce18cab33fbcc496bd4d8d65 (diff)
download: miasm-f81c3e4b42d0ce487101b8e0802e43b32b261b1d.tar.gz
miasm-f81c3e4b42d0ce487101b8e0802e43b32b261b1d.zip
21 files changed, 314 insertions, 312 deletions
diff --git a/miasm2/arch/aarch64/arch.py b/miasm2/arch/aarch64/arch.py
index 6f95df99..1a2283d6 100644
--- a/miasm2/arch/aarch64/arch.py
+++ b/miasm2/arch/aarch64/arch.py
@@ -10,7 +10,7 @@ import regs as regs_module
 from regs import *
 from miasm2.core.asmblock import AsmLabel
 from miasm2.core.cpu import log as log_cpu
-from miasm2.expression.modint import uint32, uint64
+from miasm2.expression.modint import uint32, uint64, mod_size2int
 import math
 
 log = logging.getLogger("aarch64dis")
@@ -62,8 +62,8 @@ replace_regs = {
 
     WSP: SP[:32],
 
-    WZR: m2_expr.ExprInt32(0),
-    XZR: m2_expr.ExprInt64(0),
+    WZR: m2_expr.ExprInt(0, 32),
+    XZR: m2_expr.ExprInt(0, 64),
 
 }
 
@@ -81,7 +81,7 @@ def ast_id2expr32(t):
     return t
 
 def ast_int2expr32(a):
-    return m2_expr.ExprInt32(a)
+    return m2_expr.ExprInt(a, 32)
 
 
 def ast_id2expr64(t):
@@ -93,7 +93,7 @@ def ast_id2expr64(t):
 
 
 def ast_int2expr64(a):
-    return m2_expr.ExprInt64(a)
+    return m2_expr.ExprInt(a, 64)
 
 my_var_parser32 = ParseAst(ast_id2expr32, ast_int2expr32, default_size=32)
 my_var_parser64 = ParseAst(ast_id2expr64, ast_int2expr64, default_size=64)
@@ -129,7 +129,7 @@ def shift2expr(t):
         return t[0]
     elif len(t) == 3:
         if t[0].size == 32 and isinstance(t[2], m2_expr.ExprInt):
-            t[2] = m2_expr.ExprInt32(t[2].arg)
+            t[2] = m2_expr.ExprInt(int(t[2]), 32)
         return m2_expr.ExprOp(t[1], t[0], t[2])
     else:
         raise ValueError('bad string')
@@ -140,7 +140,7 @@ def shift2expr_sc(t):
         return t[0]
     elif len(t) == 3:
         if t[0].size == 32 and isinstance(t[2], m2_expr.ExprInt):
-            t[2] = m2_expr.ExprInt32(t[2].arg)
+            t[2] = m2_expr.ExprInt(t[2].arg, 32)
         if t[1] != '<<':
             raise ValueError('bad op')
         return m2_expr.ExprOp("slice_at", t[0], t[2])
@@ -214,7 +214,7 @@ def ast_id2expr(t):
 
 
 def ast_int2expr(a):
-    return m2_expr.ExprInt64(a)
+    return m2_expr.ExprInt(a, 64)
 
 gpregs_info = {32: gpregs32_info,
                64: gpregs64_info}
@@ -236,7 +236,7 @@ base_expr.setParseAction(my_var_parser)
 def deref2expr_nooff(t):
     t = t[0]
     # XXX default
-    return m2_expr.ExprOp("preinc", t[0], m2_expr.ExprInt64(0))
+    return m2_expr.ExprOp("preinc", t[0], m2_expr.ExprInt(0, 64))
 
 
 def deref2expr_post(t):
@@ -416,7 +416,7 @@ class instruction_aarch64(instruction):
         off = e.arg - self.offset
         if int(off % 4):
             raise ValueError('strange offset! %r' % off)
-        self.args[index] = m2_expr.ExprInt64(off)
+        self.args[index] = m2_expr.ExprInt(int(off), 64)
 
 
 
@@ -782,15 +782,15 @@ class aarch64_int64_noarg(int32_noarg):
     parser = base_expr
     intsize = 64
     intmask = (1 << intsize) - 1
-    int2expr = lambda self, x: m2_expr.ExprInt64(
-        sign_ext(x, self.l, self.intsize))
+    int2expr = lambda self, x: m2_expr.ExprInt(
+        sign_ext(x, self.l, self.intsize), 64)
 
 
 class aarch64_uint64_noarg(imm_noarg):
     parser = base_expr
     intsize = 64
     intmask = (1 << intsize) - 1
-    int2expr = lambda self, x: m2_expr.ExprInt64(x)
+    int2expr = lambda self, x: m2_expr.ExprInt(x, 64)
 
 
 class aarch64_uint64(aarch64_uint64_noarg, m_arg):
@@ -1110,7 +1110,7 @@ class aarch64_immhip_page(aarch64_imm_32):
     def decode(self, v):
         v = ((v << 2) | self.parent.immlo.value) << 12
         v = sign_ext(v, 33, 64)
-        self.expr = m2_expr.ExprInt64(v)
+        self.expr = m2_expr.ExprInt(v, 64)
         return True
 
     def encode(self):
@@ -1132,7 +1132,7 @@ class aarch64_immhi_page(aarch64_imm_32):
     def decode(self, v):
         v = ((v << 2) | self.parent.immlo.value)
         v = sign_ext(v, 21, 64)
-        self.expr = m2_expr.ExprInt64(v)
+        self.expr = m2_expr.ExprInt(v, 64)
         return True
 
     def encode(self):
@@ -1222,7 +1222,7 @@ class aarch64_offs(imm_noarg, m_arg):
         v = v & self.lmask
         v = (v << 2)
         v = sign_ext(v, (self.l + 2), 64)
-        self.expr = m2_expr.ExprInt64(v)
+        self.expr = m2_expr.ExprInt(v, 64)
         return True
 
     def encode(self):
@@ -1285,7 +1285,7 @@ class aarch64_deref(m_arg):
         off = self.parent.imm.expr.arg
         op = self.get_postpre(self.parent)
         off = self.decode_w_size(off)
-        self.expr = m2_expr.ExprOp(op, reg, m2_expr.ExprInt64(off))
+        self.expr = m2_expr.ExprOp(op, reg, m2_expr.ExprInt(off, 64))
         return True
 
     def encode(self):
@@ -1308,7 +1308,7 @@ class aarch64_deref(m_arg):
         imm = self.encode_w_size(imm)
         if imm is False:
             return False
-        self.parent.imm.expr = m2_expr.ExprInt64(imm)
+        self.parent.imm.expr = m2_expr.ExprInt(imm, 64)
         if not self.parent.imm.encode():
             return False
         self.value = gpregs64_info.expr.index(reg)
diff --git a/miasm2/arch/aarch64/regs.py b/miasm2/arch/aarch64/regs.py
index 9de82c04..01ae4252 100644
--- a/miasm2/arch/aarch64/regs.py
+++ b/miasm2/arch/aarch64/regs.py
@@ -107,12 +107,12 @@ all_regs_ids_init = (simd08_init +
                      gpregs32_init +
                      gpregs64_init +
                      [
-                         ExprInt32(0),
+                         ExprInt(0, 32),
                          PC_init,
                          WZR_init,
                          XZR_init,
                          zf_init, nf_init, of_init, cf_init,
-                         ExprInt64(0), ExprInt32(0),
+                         ExprInt(0, 64), ExprInt(0, 32),
                      ]
                      )
 
diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py
index 792a4984..e9eaffc8 100644
--- a/miasm2/arch/aarch64/sem.py
+++ b/miasm2/arch/aarch64/sem.py
@@ -10,7 +10,7 @@ EXCEPT_PRIV_INSN = (1 << 17)
 
 
 def update_flag_zf(a):
-    return [m2_expr.ExprAff(zf, m2_expr.ExprCond(a, m2_expr.ExprInt1(0), m2_expr.ExprInt1(1)))]
+    return [m2_expr.ExprAff(zf, m2_expr.ExprCond(a, m2_expr.ExprInt(0, 1), m2_expr.ExprInt(1, 1)))]
 
 
 def update_flag_nf(a):
@@ -28,7 +28,7 @@ def update_flag_logic(a):
     e = []
     e += update_flag_zn(a)
     # XXX TODO: set cf if ROT imm in argument
-    # e.append(m2_expr.ExprAff(cf, m2_expr.ExprInt1(0)))
+    # e.append(m2_expr.ExprAff(cf, m2_expr.ExprInt(0, 1)))
     return e
 
 
@@ -66,7 +66,7 @@ def update_flag_add_of(op1, op2, res):
 def update_flag_sub_cf(op1, op2, res):
     "Compote CF in @res = @op1 - @op2"
     return m2_expr.ExprAff(cf,
-                           ((((op1 ^ op2) ^ res) ^ ((op1 ^ res) & (op1 ^ op2))).msb()) ^ m2_expr.ExprInt1(1))
+                           ((((op1 ^ op2) ^ res) ^ ((op1 ^ res) & (op1 ^ op2))).msb()) ^ m2_expr.ExprInt(1, 1))
 
 
 def update_flag_sub_of(op1, op2, res):
@@ -93,22 +93,22 @@ def update_flag_sub(x, y, z):
 
 
 cond2expr = {'EQ': zf,
-             'NE': zf ^ m2_expr.ExprInt1(1),
+             'NE': zf ^ m2_expr.ExprInt(1, 1),
              'CS': cf,
-             'CC': cf ^ m2_expr.ExprInt1(1),
+             'CC': cf ^ m2_expr.ExprInt(1, 1),
              'MI': nf,
-             'PL': nf ^ m2_expr.ExprInt1(1),
+             'PL': nf ^ m2_expr.ExprInt(1, 1),
              'VS': of,
-             'VC': of ^ m2_expr.ExprInt1(1),
-             'HI': cf & (zf ^ m2_expr.ExprInt1(1)),
-             'LS': (cf ^ m2_expr.ExprInt1(1)) | zf,
-             'GE': nf ^ of ^ m2_expr.ExprInt1(1),
+             'VC': of ^ m2_expr.ExprInt(1, 1),
+             'HI': cf & (zf ^ m2_expr.ExprInt(1, 1)),
+             'LS': (cf ^ m2_expr.ExprInt(1, 1)) | zf,
+             'GE': nf ^ of ^ m2_expr.ExprInt(1, 1),
              'LT': nf ^ of,
-             'GT': ((zf ^ m2_expr.ExprInt1(1)) &
-                    (nf ^ of ^ m2_expr.ExprInt1(1))),
+             'GT': ((zf ^ m2_expr.ExprInt(1, 1)) &
+                    (nf ^ of ^ m2_expr.ExprInt(1, 1))),
              'LE': zf | (nf ^ of),
-             'AL': m2_expr.ExprInt1(1),
-             'NV': m2_expr.ExprInt1(0)
+             'AL': m2_expr.ExprInt(1, 1),
+             'NV': m2_expr.ExprInt(0, 1)
              }
 
 
@@ -277,9 +277,9 @@ def movk(ir, instr, arg1, arg2):
                isinstance(arg2.args[1], m2_expr.ExprInt))
         value, shift = int(arg2.args[0].arg), int(arg2.args[1])
         e.append(
-            m2_expr.ExprAff(arg1[shift:shift + 16], m2_expr.ExprInt16(value)))
+            m2_expr.ExprAff(arg1[shift:shift + 16], m2_expr.ExprInt(value, 16)))
     else:
-        e.append(m2_expr.ExprAff(arg1[:16], m2_expr.ExprInt16(int(arg2))))
+        e.append(m2_expr.ExprAff(arg1[:16], m2_expr.ExprInt(int(arg2), 16)))
 
     return e, []
 
@@ -298,7 +298,7 @@ def movn(arg1, arg2):
 def bl(arg1):
     PC = arg1
     ir.IRDst = arg1
-    LR = m2_expr.ExprInt64(instr.offset + instr.l)
+    LR = m2_expr.ExprInt(instr.offset + instr.l, 64)
 
 @sbuild.parse
 def csel(arg1, arg2, arg3, arg4):
@@ -649,7 +649,7 @@ def ret(arg1):
 
 @sbuild.parse
 def adrp(arg1, arg2):
-    arg1 = (PC & m2_expr.ExprInt64(0xfffffffffffff000)) + arg2
+    arg1 = (PC & m2_expr.ExprInt(0xfffffffffffff000, 64)) + arg2
 
 
 @sbuild.parse
@@ -797,7 +797,7 @@ class ir_aarch64l(IntermediateRepresentation):
 
     def mod_pc(self, instr, instr_ir, extra_ir):
         "Replace PC by the instruction's offset"
-        cur_offset = m2_expr.ExprInt64(instr.offset)
+        cur_offset = m2_expr.ExprInt(instr.offset, 64)
         for i, expr in enumerate(instr_ir):
             dst, src = expr.dst, expr.src
             if dst != self.pc:
diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py
index 54a168af..0d10d6f8 100644
--- a/miasm2/arch/arm/arch.py
+++ b/miasm2/arch/arm/arch.py
@@ -103,14 +103,14 @@ CIRCUNFLEX = Literal("^")
 
 def check_bounds(left_bound, right_bound, value):
     if left_bound <= value and value <= right_bound:
-        return ExprInt32(value)
+        return ExprInt(value, 32)
     else:
         raise ValueError('shift operator immediate value out of bound')
 
 
 def check_values(values, value):
     if value in values:
-        return ExprInt32(value)
+        return ExprInt(value, 32)
     else:
         raise ValueError('shift operator immediate value out of bound')
 
@@ -184,7 +184,7 @@ def ast_id2expr(t):
 
 
 def ast_int2expr(a):
-    return ExprInt32(a)
+    return ExprInt(a, 32)
 
 
 my_var_parser = ParseAst(ast_id2expr, ast_int2expr)
@@ -208,13 +208,13 @@ rot2_expr = (gpregs.parser + Optional(
 def deref2expr_nooff(s, l, t):
     t = t[0]
     # XXX default
-    return ExprOp("preinc", t[0], ExprInt32(0))
+    return ExprOp("preinc", t[0], ExprInt(0, 32))
 
 
 def deref2expr_pre(s, l, t):
     t = t[0]
     if len(t) == 1:
-        return ExprOp("preinc", t[0], ExprInt32(0))
+        return ExprOp("preinc", t[0], ExprInt(0, 32))
     elif len(t) == 2:
         return ExprOp("preinc", t[0], t[1])
     else:
@@ -224,7 +224,7 @@ def deref2expr_pre(s, l, t):
 def deref2expr_pre_mem(s, l, t):
     t = t[0]
     if len(t) == 1:
-        return ExprMem(ExprOp("preinc", t[0], ExprInt32(0)))
+        return ExprMem(ExprOp("preinc", t[0], ExprInt(0, 32)))
     elif len(t) == 2:
         return ExprMem(ExprOp("preinc", t[0], t[1]))
     else:
@@ -425,7 +425,7 @@ class instruction_arm(instruction):
         off = e.arg - self.offset
         if int(off % 4):
             raise ValueError('strange offset! %r' % off)
-        self.args[0] = ExprInt32(off)
+        self.args[0] = ExprInt(off, 32)
 
     def get_args_expr(self):
         args = [a for a in self.args]
@@ -500,7 +500,7 @@ class instruction_armt(instruction_arm):
         off = e.arg - self.offset
         if int(off % 2):
             raise ValueError('strange offset! %r' % off)
-        self.args[0] = ExprInt32(off)
+        self.args[0] = ExprInt(off, 32)
 
     def get_asm_offset(self, expr):
         # ADR XXX, PC, imm => PC is 4 aligned + imm
@@ -824,7 +824,7 @@ class arm_offs(arm_imm):
         if (1 << (self.l - 1)) & v:
             v |= ~0 ^ self.lmask
         v = self.decodeval(v)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -844,9 +844,9 @@ class arm_imm8_12(m_arg):
     def decode(self, v):
         v = v & self.lmask
         if self.parent.updown.value:
-            e = ExprInt32(v << 2)
+            e = ExprInt(v << 2, 32)
         else:
-            e = ExprInt32(-v << 2)
+            e = ExprInt(-v << 2, 32)
         if self.parent.ppi.value:
             e = ExprOp('preinc', self.parent.rn.expr, e)
         else:
@@ -900,7 +900,7 @@ class arm_imm_4_12(m_arg):
     def decode(self, v):
         v = v & self.lmask
         imm = (self.parent.imm4.value << 12) | v
-        self.expr = ExprInt32(imm)
+        self.expr = ExprInt(imm, 32)
         return True
 
     def encode(self):
@@ -920,7 +920,7 @@ class arm_imm_12_4(m_arg):
     def decode(self, v):
         v = v & self.lmask
         imm =  (self.parent.imm.value << 4) | v
-        self.expr = ExprInt32(imm)
+        self.expr = ExprInt(imm, 32)
         return True
 
     def encode(self):
@@ -952,7 +952,7 @@ class arm_op2(m_arg):
             rot = val >> 8
             imm = val & 0xff
             imm = myror32(imm, rot * 2)
-            self.expr = ExprInt32(imm)
+            self.expr = ExprInt(imm, 32)
             return True
         rm = val & 0xf
         shift = val >> 4
@@ -974,9 +974,9 @@ class arm_op2(m_arg):
         else:
             # shift kind is imm
             amount = shift
-            shift_op = ExprInt32(amount)
+            shift_op = ExprInt(amount, 32)
         a = regs_expr[rm]
-        if shift_op == ExprInt32(0):
+        if shift_op == ExprInt(0, 32):
             if shift_type == 3:
                 self.expr = ExprOp(allshifts[4], a)
             else:
@@ -1049,9 +1049,9 @@ class arm_op2imm(arm_imm8_12):
             if self.parent.updown.value == 0:
                 imm = -imm
             if self.parent.ppi.value:
-                e = ExprOp('preinc', self.parent.rn.expr, ExprInt32(imm))
+                e = ExprOp('preinc', self.parent.rn.expr, ExprInt(imm, 32))
             else:
-                e = ExprOp('postinc', self.parent.rn.expr, ExprInt32(imm))
+                e = ExprOp('postinc', self.parent.rn.expr, ExprInt(imm, 32))
             if self.parent.wback.value == 1:
                 e = ExprOp('wback', e)
             self.expr = ExprMem(e)
@@ -1069,9 +1069,9 @@ class arm_op2imm(arm_imm8_12):
         else:
             # shift kind is imm
             amount = shift
-            shift_op = ExprInt32(amount)
+            shift_op = ExprInt(amount, 32)
         a = regs_expr[rm]
-        if shift_op == ExprInt32(0):
+        if shift_op == ExprInt(0, 32):
             pass
         else:
             a = ExprOp(allshifts[shift_type], a, shift_op)
@@ -1249,7 +1249,7 @@ class arm_offs_blx(arm_imm):
         v = sign_ext(v, 26, 32)
         # Add pipeline offset
         v += 8
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -1359,7 +1359,7 @@ class arm_immed(m_arg):
 
     def decode(self, v):
         if self.parent.immop.value == 1:
-            imm = ExprInt32((self.parent.immedH.value << 4) | v)
+            imm = ExprInt((self.parent.immedH.value << 4) | v, 32)
         else:
             imm = gpregs.expr[v]
         if self.parent.updown.value == 0:
@@ -1454,7 +1454,7 @@ class arm_mem_rn_imm(m_arg):
         value = self.parent.imm.value
         if self.parent.rw.value == 0:
             value = -value
-        imm = ExprInt32(value)
+        imm = ExprInt(value, 32)
         reg = gpregs.expr[v]
         if value:
             expr = ExprMem(reg + imm)
@@ -1622,7 +1622,7 @@ armop("isb", [bs8(0xF5), bs8(0x7F), bs8(0xF0), bs8(0x6F)])
 
 class arm_widthm1(arm_imm, m_arg):
     def decode(self, v):
-        self.expr = ExprInt32(v+1)
+        self.expr = ExprInt(v+1, 32)
         return True
 
     def encode(self):
@@ -1639,7 +1639,7 @@ class arm_rm_rot2(m_arg):
         expr = gpregs.expr[v]
         shift_value = self.parent.rot2.value
         if shift_value:
-            expr = ExprOp(allshifts[3], expr, ExprInt32(shift_value * 8))
+            expr = ExprOp(allshifts[3], expr, ExprInt(shift_value * 8, 32))
         self.expr = expr
         return True
     def encode(self):
@@ -1715,7 +1715,7 @@ class arm_offreg(m_arg):
         v = v & self.lmask
         v = self.decodeval(v)
         if v:
-            self.expr = self.off_reg + ExprInt32(v)
+            self.expr = self.off_reg + ExprInt(v, 32)
         else:
             self.expr = self.off_reg
 
@@ -1746,7 +1746,7 @@ class arm_offpc(arm_offreg):
         v = v & self.lmask
         v <<= 2
         if v:
-            self.expr = ExprMem(self.off_reg + ExprInt32(v))
+            self.expr = ExprMem(self.off_reg + ExprInt(v, 32))
         else:
             self.expr = ExprMem(self.off_reg)
 
@@ -1853,7 +1853,7 @@ class arm_offbw(imm_noarg):
         v = v & self.lmask
         if self.parent.trb.value == 0:
             v <<= 2
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -1874,7 +1874,7 @@ class arm_offh(imm_noarg):
     def decode(self, v):
         v = v & self.lmask
         v <<= 1
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -2177,7 +2177,7 @@ class armt_gpreg_rm_shift_off(arm_reg):
             shift = allshifts_armt[self.parent.stype.value]
         else:
             shift = allshifts_armt[4]
-        self.expr = ExprOp(shift, r, ExprInt32(i))
+        self.expr = ExprOp(shift, r, ExprInt(i, 32))
         return True
 
     def encode(self):
@@ -2219,26 +2219,26 @@ class armt2_imm12(arm_imm):
 
         # simple encoding
         if 0 <= v < 0x100:
-            self.expr = ExprInt32(v)
+            self.expr = ExprInt(v, 32)
             return True
         # 00XY00XY form
         if v >> 8 == 1:
             v &= 0xFF
-            self.expr = ExprInt32((v << 16) | v)
+            self.expr = ExprInt((v << 16) | v, 32)
             return True
         # XY00XY00 form
         if v >> 8 == 2:
             v &= 0xFF
-            self.expr = ExprInt32((v << 24) | (v << 8))
+            self.expr = ExprInt((v << 24) | (v << 8), 32)
             return True
         # XYXYXYXY
         if v >> 8 == 3:
             v &= 0xFF
-            self.expr = ExprInt32((v << 24) | (v << 16) | (v << 8) | v)
+            self.expr = ExprInt((v << 24) | (v << 16) | (v << 8) | v, 32)
             return True
         r = v >> 7
         v = v & 0xFF
-        self.expr = ExprInt32(myror32(v, r))
+        self.expr = ExprInt(myror32(v, r), 32)
         return True
 
     def encode(self):
@@ -2290,7 +2290,7 @@ class armt2_imm10l(arm_imm):
         v = (s << 24) | (i1 << 23) | (
             i2 << 22) | (imm10h << 12) | (imm10l << 2)
         v = sign_ext(v, 25, 32)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -2329,7 +2329,7 @@ class armt2_imm11l(arm_imm):
         v = (s << 24) | (i1 << 23) | (
             i2 << 22) | (imm10h << 12) | (imm11l << 1)
         v = sign_ext(v, 25, 32)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -2369,7 +2369,7 @@ class armt_imm5_1(arm_imm):
 
     def decode(self, v):
         v = sign_ext(((self.parent.imm1.value << 5) | v) << 1, 7, 32)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
diff --git a/miasm2/arch/arm/regs.py b/miasm2/arch/arm/regs.py
index a44878a8..69488cb5 100644
--- a/miasm2/arch/arm/regs.py
+++ b/miasm2/arch/arm/regs.py
@@ -78,7 +78,7 @@ all_regs_ids_init = [R0_init, R1_init, R2_init, R3_init,
                      R8_init, R9_init, R10_init, R11_init,
                      R12_init, SP_init, LR_init, PC_init,
                      zf_init, nf_init, of_init, cf_init,
-                     ExprInt32(0), ExprInt32(0)
+                     ExprInt(0, 32), ExprInt(0, 32)
                      ]
 
 regs_init = {}
diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py
index 8c74aa76..710cdc9f 100644
--- a/miasm2/arch/arm/sem.py
+++ b/miasm2/arch/arm/sem.py
@@ -13,7 +13,7 @@ EXCEPT_PRIV_INSN = (1 << 17)
 
 
 def update_flag_zf(a):
-    return [ExprAff(zf, ExprCond(a, ExprInt1(0), ExprInt1(1)))]
+    return [ExprAff(zf, ExprCond(a, ExprInt(0, 1), ExprInt(1, 1)))]
 
 
 def update_flag_nf(a):
@@ -31,7 +31,7 @@ def update_flag_logic(a):
     e = []
     e += update_flag_zn(a)
     # XXX TODO: set cf if ROT imm in argument
-    #e.append(ExprAff(cf, ExprInt1(0)))
+    #e.append(ExprAff(cf, ExprInt(0, 1)))
     return e
 
 
@@ -68,7 +68,7 @@ def update_flag_add_of(op1, op2, res):
 def update_flag_sub_cf(op1, op2, res):
     "Compote CF in @res = @op1 - @op2"
     return ExprAff(cf,
-        ((((op1 ^ op2) ^ res) ^ ((op1 ^ res) & (op1 ^ op2))).msb()) ^ ExprInt1(1))
+        ((((op1 ^ op2) ^ res) ^ ((op1 ^ res) & (op1 ^ op2))).msb()) ^ ExprInt(1, 1))
 
 
 def update_flag_sub_of(op1, op2, res):
@@ -227,7 +227,7 @@ def sbc(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = (b + cf.zeroExtend(32)) - (c + ExprInt32(1))
+    r = (b + cf.zeroExtend(32)) - (c + ExprInt(1, 32))
     e.append(ExprAff(a, r))
     dst = get_dst(a)
     if dst is not None:
@@ -239,7 +239,7 @@ def sbcs(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = (b + cf.zeroExtend(32)) - (c + ExprInt32(1))
+    r = (b + cf.zeroExtend(32)) - (c + ExprInt(1, 32))
     e += update_flag_arith(r)
     e += update_flag_sub(b, c, r)
     e.append(ExprAff(a, r))
@@ -253,7 +253,7 @@ def rsc(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = (c + cf.zeroExtend(32)) - (b + ExprInt32(1))
+    r = (c + cf.zeroExtend(32)) - (b + ExprInt(1, 32))
     e.append(ExprAff(a, r))
     dst = get_dst(a)
     if dst is not None:
@@ -265,7 +265,7 @@ def rscs(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = (c + cf.zeroExtend(32)) - (b + ExprInt32(1))
+    r = (c + cf.zeroExtend(32)) - (b + ExprInt(1, 32))
     e.append(ExprAff(a, r))
     e += update_flag_arith(r)
     e += update_flag_sub(c, b, r)
@@ -348,7 +348,7 @@ def mov(ir, instr, a, b):
 
 
 def movt(ir, instr, a, b):
-    r = a | b << ExprInt32(16)
+    r = a | b << ExprInt(16, 32)
     e = [ExprAff(a, r)]
     dst = get_dst(a)
     if dst is not None:
@@ -368,7 +368,7 @@ def movs(ir, instr, a, b):
 
 
 def mvn(ir, instr, a, b):
-    r = b ^ ExprInt32(-1)
+    r = b ^ ExprInt(-1, 32)
     e = [ExprAff(a, r)]
     dst = get_dst(a)
     if dst is not None:
@@ -378,7 +378,7 @@ def mvn(ir, instr, a, b):
 
 def mvns(ir, instr, a, b):
     e = []
-    r = b ^ ExprInt32(-1)
+    r = b ^ ExprInt(-1, 32)
     e.append(ExprAff(a, r))
     # XXX TODO check
     e += update_flag_logic(r)
@@ -405,7 +405,7 @@ def bic(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = b & (c ^ ExprInt(uint32(-1)))
+    r = b & (c ^ ExprInt(-1, 32))
     e.append(ExprAff(a, r))
     dst = get_dst(a)
     if dst is not None:
@@ -417,7 +417,7 @@ def bics(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = b & (c ^ ExprInt(uint32(-1)))
+    r = b & (c ^ ExprInt(-1, 32))
     e += update_flag_logic(r)
     e.append(ExprAff(a, r))
     dst = get_dst(a)
@@ -512,7 +512,7 @@ def b(ir, instr, a):
 
 def bl(ir, instr, a):
     e = []
-    l = ExprInt32(instr.offset + instr.l)
+    l = ExprInt(instr.offset + instr.l, 32)
     e.append(ExprAff(PC, a))
     e.append(ExprAff(ir.IRDst, a))
     e.append(ExprAff(LR, l))
@@ -528,7 +528,7 @@ def bx(ir, instr, a):
 
 def blx(ir, instr, a):
     e = []
-    l = ExprInt32(instr.offset + instr.l)
+    l = ExprInt(instr.offset + instr.l, 32)
     e.append(ExprAff(PC, a))
     e.append(ExprAff(ir.IRDst, a))
     e.append(ExprAff(LR, l))
@@ -549,9 +549,9 @@ def st_ld_r(ir, instr, a, b, store=False, size=32, s_ext=False, z_ext=False):
             postinc = True
     if isinstance(b, ExprOp) and b.op in ["postinc", 'preinc']:
         # XXX TODO CHECK
-        base, off = b.args[0],  b.args[1]  # ExprInt32(size/8)
+        base, off = b.args[0],  b.args[1]  # ExprInt(size/8, 32)
     else:
-        base, off = b, ExprInt32(0)
+        base, off = b, ExprInt(0, 32)
     # print a, wb, base, off, postinc
     if postinc:
         ad = base
@@ -584,14 +584,14 @@ def st_ld_r(ir, instr, a, b, store=False, size=32, s_ext=False, z_ext=False):
     if store:
         e.append(ExprAff(m, a))
         if dmem:
-            e.append(ExprAff(ExprMem(ad + ExprInt32(4), size=size), a2))
+            e.append(ExprAff(ExprMem(ad + ExprInt(4, 32), size=size), a2))
     else:
         if a == PC:
             dst = PC
             e.append(ExprAff(ir.IRDst, m))
         e.append(ExprAff(a, m))
         if dmem:
-            e.append(ExprAff(a2, ExprMem(ad + ExprInt32(4), size=size)))
+            e.append(ExprAff(a2, ExprMem(ad + ExprInt(4, 32), size=size)))
 
     # XXX TODO check multiple write cause by wb
     if wb or postinc:
@@ -668,9 +668,9 @@ def st_ld_m(ir, instr, a, b, store=False, postinc=False, updown=False):
     if postinc:
         pass
     else:
-        base += ExprInt32(step)
+        base += ExprInt(step, 32)
     for i, r in enumerate(regs):
-        ad = base + ExprInt32(i * step)
+        ad = base + ExprInt(i * step, 32)
         if store:
             e.append(ExprAff(ExprMem(ad), r))
         else:
@@ -680,9 +680,9 @@ def st_ld_m(ir, instr, a, b, store=False, postinc=False, updown=False):
     # XXX TODO check multiple write cause by wb
     if wb:
         if postinc:
-            e.append(ExprAff(a, base + ExprInt32(len(regs) * step)))
+            e.append(ExprAff(a, base + ExprInt(len(regs) * step, 32)))
         else:
-            e.append(ExprAff(a, base + ExprInt32((len(regs) - 1) * step)))
+            e.append(ExprAff(a, base + ExprInt((len(regs) - 1) * step, 32)))
     if store:
         pass
     else:
@@ -726,7 +726,7 @@ def stmdb(ir, instr, a, b):
 def svc(ir, instr, a):
     # XXX TODO implement
     e = [
-        ExprAff(exception_flags, ExprInt32(EXCEPT_PRIV_INSN))]
+        ExprAff(exception_flags, ExprInt(EXCEPT_PRIV_INSN, 32))]
     return e
 
 
@@ -812,9 +812,9 @@ def push(ir, instr, a):
     e = []
     regs = list(a.args)
     for i in xrange(len(regs)):
-        r = SP + ExprInt32(-4 * (i + 1))
+        r = SP + ExprInt(-4 * (i + 1), 32)
         e.append(ExprAff(ExprMem(r), regs[i]))
-    r = SP + ExprInt32(-4 * len(regs))
+    r = SP + ExprInt(-4 * len(regs), 32)
     e.append(ExprAff(SP, r))
     return e
 
@@ -824,11 +824,11 @@ def pop(ir, instr, a):
     regs = list(a.args)
     dst = None
     for i in xrange(len(regs)):
-        r = SP + ExprInt32(4 * i)
+        r = SP + ExprInt(4 * i, 32)
         e.append(ExprAff(regs[i], ExprMem(r)))
         if regs[i] == ir.pc:
             dst = ExprMem(r)
-    r = SP + ExprInt32(4 * len(regs))
+    r = SP + ExprInt(4 * len(regs), 32)
     e.append(ExprAff(SP, r))
     if dst is not None:
         e.append(ExprAff(ir.IRDst, dst))
@@ -913,7 +913,7 @@ def bfc(ir, instr, a, b, c):
         out.append(a[:start])
         last = start
     if stop - start:
-        out.append(ExprInt32(0)[last:stop])
+        out.append(ExprInt(0, 32)[last:stop])
         last = stop
     if last < 32:
         out.append(a[last:])
@@ -942,13 +942,13 @@ def clz(ir, instr, a, b):
 
 def uxtab(ir, instr, a, b, c):
     e = []
-    e.append(ExprAff(a, b + (c & ExprInt32(0xff))))
+    e.append(ExprAff(a, b + (c & ExprInt(0xff, 32))))
     return e
 
 
 def bkpt(ir, instr, a):
     e = []
-    e.append(ExprAff(exception_flags, ExprInt32(EXCEPT_SOFT_BP)))
+    e.append(ExprAff(exception_flags, ExprInt(EXCEPT_SOFT_BP, 32)))
     e.append(ExprAff(bp_num, a))
     return e
 
@@ -1003,26 +1003,26 @@ cond_dct = {
 
 
 tab_cond = {COND_EQ: zf,
-            COND_NE: ExprCond(zf, ExprInt1(0), ExprInt1(1)),
+            COND_NE: ExprCond(zf, ExprInt(0, 1), ExprInt(1, 1)),
             COND_CS: cf,
-            COND_CC: ExprCond(cf, ExprInt1(0), ExprInt1(1)),
+            COND_CC: ExprCond(cf, ExprInt(0, 1), ExprInt(1, 1)),
             COND_MI: nf,
-            COND_PL: ExprCond(nf, ExprInt1(0), ExprInt1(1)),
+            COND_PL: ExprCond(nf, ExprInt(0, 1), ExprInt(1, 1)),
             COND_VS: of,
-            COND_VC: ExprCond(of, ExprInt1(0), ExprInt1(1)),
-            COND_HI: cf & ExprCond(zf, ExprInt1(0), ExprInt1(1)),
+            COND_VC: ExprCond(of, ExprInt(0, 1), ExprInt(1, 1)),
+            COND_HI: cf & ExprCond(zf, ExprInt(0, 1), ExprInt(1, 1)),
             # COND_HI: cf,
             # COND_HI: ExprOp('==',
             #                ExprOp('|', cf, zf),
-            #                ExprInt1(0)),
-            COND_LS: ExprCond(cf, ExprInt1(0), ExprInt1(1)) | zf,
-            COND_GE: ExprCond(nf - of, ExprInt1(0), ExprInt1(1)),
+            #                ExprInt(0, 1)),
+            COND_LS: ExprCond(cf, ExprInt(0, 1), ExprInt(1, 1)) | zf,
+            COND_GE: ExprCond(nf - of, ExprInt(0, 1), ExprInt(1, 1)),
             COND_LT: nf ^ of,
             # COND_GT: ExprOp('|',
-            #                ExprOp('==', zf, ExprInt1(0)) & (nf | of),
-            # ExprOp('==', nf, ExprInt1(0)) & ExprOp('==', of, ExprInt1(0))),
-            COND_GT: (ExprCond(zf, ExprInt1(0), ExprInt1(1)) &
-                      ExprCond(nf - of, ExprInt1(0), ExprInt1(1))),
+            #                ExprOp('==', zf, ExprInt(0, 1)) & (nf | of),
+            # ExprOp('==', nf, ExprInt(0, 1)) & ExprOp('==', of, ExprInt(0, 1))),
+            COND_GT: (ExprCond(zf, ExprInt(0, 1), ExprInt(1, 1)) &
+                      ExprCond(nf - of, ExprInt(0, 1), ExprInt(1, 1))),
             COND_LE: zf | (nf ^ of),
             }
 
@@ -1250,13 +1250,13 @@ class ir_arml(IntermediateRepresentation):
         #    return instr_ir, extra_ir
         for i, x in enumerate(instr_ir):
             x = ExprAff(x.dst, x.src.replace_expr(
-                {self.pc: ExprInt32(instr.offset + 8)}))
+                {self.pc: ExprInt(instr.offset + 8, 32)}))
             instr_ir[i] = x
         for irblock in extra_ir:
             for irs in irblock.irs:
                 for i, x in enumerate(irs):
                     x = ExprAff(x.dst, x.src.replace_expr(
-                        {self.pc: ExprInt32(instr.offset + 8)}))
+                        {self.pc: ExprInt(instr.offset + 8, 32)}))
                     irs[i] = x
         # return out_ir, extra_ir
         return instr_ir, extra_ir
diff --git a/miasm2/arch/mips32/arch.py b/miasm2/arch/mips32/arch.py
index f11c6e3a..d64e27df 100644
--- a/miasm2/arch/mips32/arch.py
+++ b/miasm2/arch/mips32/arch.py
@@ -5,7 +5,7 @@ from collections import defaultdict
 
 from pyparsing import Literal, Group, Optional
 
-from miasm2.expression.expression import ExprMem, ExprInt, ExprInt32, ExprId
+from miasm2.expression.expression import ExprMem, ExprInt, ExprId
 from miasm2.core.bin_stream import bin_stream
 import miasm2.arch.mips32.regs as regs
 import miasm2.core.cpu as cpu
@@ -56,7 +56,7 @@ def ast_id2expr(t):
 
 
 def ast_int2expr(a):
-    return ExprInt32(a)
+    return ExprInt(a, 32)
 
 
 my_var_parser = cpu.ParseAst(ast_id2expr, ast_int2expr)
@@ -176,7 +176,7 @@ class instruction_mips32(cpu.instruction):
         off = e.arg - self.offset
         if int(off % 4):
             raise ValueError('strange offset! %r' % off)
-        self.args[ndx] = ExprInt32(off)
+        self.args[ndx] = ExprInt(off, 32)
 
     def get_args_expr(self):
         args = [a for a in self.args]
@@ -299,7 +299,7 @@ class mips32_s16imm_noarg(mips32_imm):
     def decode(self, v):
         v = v & self.lmask
         v = cpu.sign_ext(v, 16, 32)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -319,7 +319,7 @@ class mips32_soff_noarg(mips32_imm):
         v <<= 2
         v = cpu.sign_ext(v, 16+2, 32)
         # Add pipeline offset
-        self.expr = ExprInt32(v + 4)
+        self.expr = ExprInt(v + 4, 32)
         return True
 
     def encode(self):
@@ -345,7 +345,7 @@ class mips32_soff(mips32_soff_noarg, cpu.m_arg):
 class mips32_instr_index(mips32_imm, cpu.m_arg):
     def decode(self, v):
         v = v & self.lmask
-        self.expr = ExprInt32(v<<2)
+        self.expr = ExprInt(v<<2, 32)
         return True
 
     def encode(self):
@@ -364,7 +364,7 @@ class mips32_instr_index(mips32_imm, cpu.m_arg):
 class mips32_u16imm(mips32_imm, cpu.m_arg):
     def decode(self, v):
         v = v & self.lmask
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -389,7 +389,7 @@ class mips32_dreg_imm(cpu.m_arg):
             return False
         arg = e.arg
         if isinstance(arg, ExprId):
-            self.parent.imm.expr = ExprInt32(0)
+            self.parent.imm.expr = ExprInt(0, 32)
             r = arg
         elif len(arg.args) == 2 and arg.op == "+":
             self.parent.imm.expr = arg.args[1]
@@ -411,7 +411,7 @@ class mips32_dreg_imm(cpu.m_arg):
 class mips32_esize(mips32_imm, cpu.m_arg):
     def decode(self, v):
         v = v & self.lmask
-        self.expr = ExprInt32(v+1)
+        self.expr = ExprInt(v+1, 32)
         return True
 
     def encode(self):
@@ -424,7 +424,7 @@ class mips32_esize(mips32_imm, cpu.m_arg):
 
 class mips32_eposh(mips32_imm, cpu.m_arg):
     def decode(self, v):
-        self.expr = ExprInt32(v-int(self.parent.epos.expr)+1)
+        self.expr = ExprInt(v-int(self.parent.epos.expr)+1, 32)
         return True
 
     def encode(self):
diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py
index dd02ff50..92af5cc5 100644
--- a/miasm2/arch/mips32/ira.py
+++ b/miasm2/arch/mips32/ira.py
@@ -1,6 +1,6 @@
 #-*- coding:utf-8 -*-
 
-from miasm2.expression.expression import ExprAff, ExprInt32, ExprId
+from miasm2.expression.expression import ExprAff, ExprInt, ExprId
 from miasm2.ir.ir import IntermediateRepresentation, IRBlock, AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b
@@ -29,7 +29,7 @@ class ir_a_mips32l(ir_mips32l, ira):
             if not expr_is_int_or_label(lr_val):
                 continue
             if expr_is_label(lr_val):
-                lr_val = ExprInt32(lr_val.name.offset)
+                lr_val = ExprInt(lr_val.name.offset, 32)
 
             line = block.lines[-2]
             if lr_val.arg != line.offset + 8:
diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py
index d982f033..bc050b38 100644
--- a/miasm2/arch/mips32/sem.py
+++ b/miasm2/arch/mips32/sem.py
@@ -443,13 +443,13 @@ class ir_mips32l(IntermediateRepresentation):
 
         for i, x in enumerate(instr_ir):
             x = m2_expr.ExprAff(x.dst, x.src.replace_expr(
-                {self.pc: m2_expr.ExprInt32(instr.offset + 4)}))
+                {self.pc: m2_expr.ExprInt(instr.offset + 4, 32)}))
             instr_ir[i] = x
         for irblock in extra_ir:
             for irs in irblock.irs:
                 for i, x in enumerate(irs):
                     x = m2_expr.ExprAff(x.dst, x.src.replace_expr(
-                        {self.pc: m2_expr.ExprInt32(instr.offset + 4)}))
+                        {self.pc: m2_expr.ExprInt(instr.offset + 4, 32)}))
                     irs[i] = x
         return instr_ir, extra_ir
 
diff --git a/miasm2/arch/msp430/arch.py b/miasm2/arch/msp430/arch.py
index 07ba3019..9728d776 100644
--- a/miasm2/arch/msp430/arch.py
+++ b/miasm2/arch/msp430/arch.py
@@ -75,7 +75,7 @@ def ast_id2expr(t):
 
 
 def ast_int2expr(a):
-    return ExprInt16(a)
+    return ExprInt(a, 16)
 
 
 variable, operand, base_expr = gen_base_expr()
@@ -328,12 +328,12 @@ class msp430_sreg_arg(reg_noarg, m_arg):
                 self.expr = e
         elif self.parent.a_s.value == 0b01:
             if e == SR:
-                self.expr = ExprMem(ExprInt16(self.parent.off_s.value), size)
+                self.expr = ExprMem(ExprInt(self.parent.off_s.value, 16), size)
             elif e == R3:
                 self.expr = ExprInt(1, size)
             else:
                 self.expr = ExprMem(
-                    e + ExprInt16(self.parent.off_s.value), size)
+                    e + ExprInt(self.parent.off_s.value, 16), size)
         elif self.parent.a_s.value == 0b10:
             if e == SR:
                 self.expr = ExprInt(4, size)
@@ -431,9 +431,9 @@ class msp430_dreg_arg(msp430_sreg_arg):
             self.expr = e
         elif self.parent.a_d.value == 1:
             if e == SR:
-                x = ExprInt16(self.parent.off_d.value)
+                x = ExprInt(self.parent.off_d.value, 16)
             else:
-                x = e + ExprInt16(self.parent.off_d.value)
+                x = e + ExprInt(self.parent.off_d.value, 16)
             self.expr = ExprMem(x, size)
         else:
             raise NotImplementedError(
@@ -448,7 +448,7 @@ class msp430_dreg_arg(msp430_sreg_arg):
             self.value = self.reg_info.expr.index(e)
         elif isinstance(e, ExprMem):
             if isinstance(e.arg, ExprId):
-                r, i = e.arg, ExprInt16(0)
+                r, i = e.arg, ExprInt(0, 16)
             elif isinstance(e.arg, ExprOp):
                 r, i = e.arg.args[0], e.arg.args[1]
             elif isinstance(e.arg, ExprInt):
@@ -538,7 +538,7 @@ class msp430_offs(imm_noarg, m_arg):
         if (1 << (self.l - 1)) & v:
             v |= ~0 ^ self.lmask
         v = self.decodeval(v)
-        self.expr = ExprInt16(v)
+        self.expr = ExprInt(v, 16)
         return True
 
     def encode(self):
diff --git a/miasm2/arch/msp430/sem.py b/miasm2/arch/msp430/sem.py
index e8eb91cc..5bf2999f 100644
--- a/miasm2/arch/msp430/sem.py
+++ b/miasm2/arch/msp430/sem.py
@@ -53,7 +53,7 @@ def update_flag_zn_r(a):
 
 def update_flag_sub_cf(a, b, c):
     return [ExprAff(cf,
-        ((((a ^ b) ^ c) ^ ((a ^ c) & (a ^ b))).msb()) ^ ExprInt1(1))]
+        ((((a ^ b) ^ c) ^ ((a ^ c) & (a ^ b))).msb()) ^ ExprInt(1, 1))]
 
 
 def update_flag_add_cf(a, b, c):
@@ -77,7 +77,7 @@ def mng_autoinc(a, b, size):
     e.append(ExprAff(a_r, a_r + ExprInt(size / 8, a_r.size)))
     a = ExprMem(a_r, size)
     if isinstance(b, ExprMem) and a_r in b.arg:
-        b = ExprMem(b.arg + ExprInt16(size / 8), b.size)
+        b = ExprMem(b.arg + ExprInt(size / 8, 16), b.size)
     return e, a, b
 
 # Mnemonics
@@ -108,7 +108,7 @@ def and_b(ir, instr, a, b):
     e.append(ExprAff(b, c.zeroExtend(16)))
     e += update_flag_zn_r(c)
     e += update_flag_cf_inv_zf(c)
-    e += [ExprAff(of, ExprInt1(0))]
+    e += [ExprAff(of, ExprInt(0, 1))]
     return e, []
 
 
@@ -118,13 +118,13 @@ def and_w(ir, instr, a, b):
     e.append(ExprAff(b, c))
     e += update_flag_zn_r(c)
     e += update_flag_cf_inv_zf(c)
-    e += [ExprAff(of, ExprInt1(0))]
+    e += [ExprAff(of, ExprInt(0, 1))]
     return e, []
 
 
 def bic_b(ir, instr, a, b):
     e, a, b = mng_autoinc(a, b, 8)
-    c = (a[:8] ^ ExprInt8(0xff)) & b[:8]
+    c = (a[:8] ^ ExprInt(0xff, 8)) & b[:8]
     c = c.zeroExtend(b.size)
     e.append(ExprAff(b, c))
     return e, []
@@ -132,7 +132,7 @@ def bic_b(ir, instr, a, b):
 
 def bic_w(ir, instr, a, b):
     e, a, b = mng_autoinc(a, b, 16)
-    c = (a ^ ExprInt16(0xffff)) & b
+    c = (a ^ ExprInt(0xffff, 16)) & b
     e.append(ExprAff(b, c))
     return e, []
 
@@ -149,7 +149,7 @@ def bit_w(ir, instr, a, b):
     c = a & b
     e += update_flag_zn_r(c)
     e += update_flag_cf_inv_zf(c)
-    e.append(ExprAff(of, ExprInt1(0)))
+    e.append(ExprAff(of, ExprInt(0, 1)))
     return e, []
 
 """
@@ -231,16 +231,16 @@ def xor_w(ir, instr, a, b):
 
 def push_w(ir, instr, a):
     e = []
-    e.append(ExprAff(ExprMem(SP - ExprInt16(2), 16), a))
-    e.append(ExprAff(SP, SP - ExprInt16(2)))
+    e.append(ExprAff(ExprMem(SP - ExprInt(2, 16), 16), a))
+    e.append(ExprAff(SP, SP - ExprInt(2, 16)))
     return e, []
 
 
 def call(ir, instr, a):
     e, a, dummy = mng_autoinc(a, None, 16)
     n = ExprId(ir.get_next_label(instr), 16)
-    e.append(ExprAff(ExprMem(SP - ExprInt16(2), 16), n))
-    e.append(ExprAff(SP, SP - ExprInt16(2)))
+    e.append(ExprAff(ExprMem(SP - ExprInt(2, 16), 16), n))
+    e.append(ExprAff(SP, SP - ExprInt(2, 16)))
     e.append(ExprAff(PC, a))
     e.append(ExprAff(ir.IRDst, a))
     return e, []
@@ -338,7 +338,7 @@ def rrc_w(ir, instr, a):
     # e += update_flag_nf(a)
     e += reset_sr_res()
 
-    e.append(ExprAff(of, ExprInt1(0)))
+    e.append(ExprAff(of, ExprInt(0, 1)))
     return e, []
 
 
@@ -355,7 +355,7 @@ def rra_w(ir, instr, a):
     # e += update_flag_nf(a)
     e += reset_sr_res()
 
-    e.append(ExprAff(of, ExprInt1(0)))
+    e.append(ExprAff(of, ExprInt(0, 1)))
     return e, []
 
 
@@ -366,7 +366,7 @@ def sxt(ir, instr, a):
 
     e += update_flag_zn_r(c)
     e += update_flag_cf_inv_zf(c)
-    e.append(ExprAff(of, ExprInt1(0)))
+    e.append(ExprAff(of, ExprInt(0, 1)))
 
     return e, []
 
@@ -441,7 +441,7 @@ class ir_msp430(IntermediateRepresentation):
             instr_ir[i:i+1] = xx
         for i, x in enumerate(instr_ir):
             x = ExprAff(x.dst, x.src.replace_expr(
-                {self.pc: ExprInt16(instr.offset + instr.l)}))
+                {self.pc: ExprInt(instr.offset + instr.l, 16)}))
             instr_ir[i] = x
 
         if extra_ir:
diff --git a/miasm2/arch/sh4/arch.py b/miasm2/arch/sh4/arch.py
index 634cbf43..3d0eee00 100644
--- a/miasm2/arch/sh4/arch.py
+++ b/miasm2/arch/sh4/arch.py
@@ -38,7 +38,7 @@ def ast_id2expr(t):
     return mn_sh4.regs.all_regs_ids_byname.get(t, t)
 
 def ast_int2expr(a):
-    return ExprInt32(a)
+    return ExprInt(a, 32)
 
 
 my_var_parser = ParseAst(ast_id2expr, ast_int2expr)
@@ -219,7 +219,7 @@ class sh4_dgpreg_imm(sh4_dgpreg):
         p = self.parent
         r = gpregs.expr[v]
         s = self.sz
-        d = ExprInt32(p.disp.value * s / 8)
+        d = ExprInt(p.disp.value * s / 8, 32)
         e = ExprMem(r + d, s)
         self.expr = e
         return True
@@ -263,7 +263,7 @@ class sh4_simm(sh4_imm):
     def decode(self, v):
         v = sign_ext(v, self.l, 32)
         v = self.decodeval(v)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -281,7 +281,7 @@ class sh4_dpc16imm(sh4_dgpreg):
     parser = deref_pc
 
     def decode(self, v):
-        self.expr = ExprMem(PC + ExprInt32(v * 2 + 4), 16)
+        self.expr = ExprMem(PC + ExprInt(v * 2 + 4, 32), 16)
         return True
 
     def calcdisp(self, v):
@@ -308,7 +308,7 @@ class sh4_dgbrimm8(sh4_dgpreg):
 
     def decode(self, v):
         s = self.sz
-        self.expr = ExprMem(GBR + ExprInt32(v * s / 8), s)
+        self.expr = ExprMem(GBR + ExprInt(v * s / 8, 32), s)
         return True
 
     def encode(self):
@@ -331,7 +331,7 @@ class sh4_dpc32imm(sh4_dpc16imm):
 
     def decode(self, v):
         self.expr = ExprMem(
-            (PC & ExprInt32(0xfffffffc)) + ExprInt32(v * 4 + 4))
+            (PC & ExprInt(0xfffffffc, 32)) + ExprInt(v * 4 + 4, 32))
         return True
 
     def calcdisp(self, v):
@@ -342,7 +342,7 @@ class sh4_dpc32imm(sh4_dpc16imm):
 
     def encode(self):
         res = MatchExpr(
-            self.expr, ExprMem((PC & ExprInt32(0xFFFFFFFC)) + jra, 32), [jra])
+            self.expr, ExprMem((PC & ExprInt(0xFFFFFFFC, 32)) + jra, 32), [jra])
         if not res:
             return False
         if not isinstance(res[jra], ExprInt):
@@ -358,11 +358,11 @@ class sh4_pc32imm(m_arg):
     parser = pcdisp
 
     def decode(self, v):
-        self.expr = (PC & ExprInt32(0xfffffffc)) + ExprInt32(v * 4 + 4)
+        self.expr = (PC & ExprInt(0xfffffffc, 32)) + ExprInt(v * 4 + 4, 32)
         return True
 
     def encode(self):
-        res = MatchExpr(self.expr, (PC & ExprInt32(0xfffffffc)) + jra, [jra])
+        res = MatchExpr(self.expr, (PC & ExprInt(0xfffffffc, 32)) + jra, [jra])
         if not res:
             return False
         if not isinstance(res[jra], ExprInt):
@@ -455,7 +455,7 @@ class instruction_sh4(instruction):
         print hex(off)
         if int(off % 4):
             raise ValueError('strange offset! %r' % off)
-        self.args[0] = ExprInt32(off)
+        self.args[0] = ExprInt(off, 32)
         print 'final', self.args[0]
 
     def get_args_expr(self):
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py
index d686cd55..300021c1 100644
--- a/miasm2/arch/x86/arch.py
+++ b/miasm2/arch/x86/arch.py
@@ -227,7 +227,7 @@ def ast_id2expr(t):
 
 
 def ast_int2expr(a):
-    return ExprInt64(a)
+    return ExprInt(a, 64)
 
 
 my_var_parser = ParseAst(ast_id2expr, ast_int2expr)
@@ -1126,7 +1126,7 @@ class x86_s08to16(x86_imm):
     out_size = 16
 
     def myexpr(self, x):
-        return ExprInt16(x)
+        return ExprInt(x, 16)
 
     def int2expr(self, v):
         return self.myexpr(v)
@@ -1143,7 +1143,7 @@ class x86_s08to16(x86_imm):
         v = v & self.lmask
         v = self.decodeval(v)
         if self.parent.v_opmode() == 64:
-            self.expr = ExprInt64(sign_ext(v, self.in_size, 64))
+            self.expr = ExprInt(sign_ext(v, self.in_size, 64), 64)
         else:
             if (1 << (self.l - 1)) & v:
                 v = sign_ext(v, self.l, self.out_size)
@@ -1191,15 +1191,15 @@ class x86_s08to32(x86_s08to16):
     out_size = 32
 
     def myexpr(self, x):
-        return ExprInt32(x)
+        return ExprInt(x, 32)
 
     def decode(self, v):
         v = v & self.lmask
         v = self.decodeval(v)
         if self.parent.rex_w.value == 1:
-            v = ExprInt64(sign_ext(v, self.in_size, 64))
+            v = ExprInt(sign_ext(v, self.in_size, 64), 64)
         else:
-            v = ExprInt32(sign_ext(v, self.in_size, 32))
+            v = ExprInt(sign_ext(v, self.in_size, 32), 32)
 
         self.expr = v
         return True
@@ -1210,7 +1210,7 @@ class x86_s08to64(x86_s08to32):
     out_size = 64
 
     def myexpr(self, x):
-        return ExprInt64(x)
+        return ExprInt(x, 64)
 
 
 class x86_s32to64(x86_s08to32):
@@ -1218,7 +1218,7 @@ class x86_s32to64(x86_s08to32):
     out_size = 64
 
     def myexpr(self, x):
-        return ExprInt64(x)
+        return ExprInt(x, 64)
 
 
 class bs_eax(m_arg):
@@ -1754,15 +1754,15 @@ def parse_mem(expr, parent, w8, sx=0, xmm=0, mm=0):
     out = []
     if disp is None:
         # add 0 disp
-        disp = ExprInt32(0)
+        disp = ExprInt(0, 32)
     if disp is not None:
-        for signed, encoding, cast_int in [(True, f_s08, ExprInt8),
-                                           (True, f_s16, ExprInt16),
-                                           (True, f_s32, ExprInt32),
-                                           (False, f_u08, ExprInt8),
-                                           (False, f_u16, ExprInt16),
-                                           (False, f_u32, ExprInt32)]:
-            value = cast_int(int(disp))
+        for signed, encoding, cast_size in [(True, f_s08, 8),
+                                           (True, f_s16, 16),
+                                           (True, f_s32, 32),
+                                           (False, f_u08, 8),
+                                           (False, f_u16, 16),
+                                           (False, f_u32, 32)]:
+            value = ExprInt(int(disp), cast_size)
             if admode < value.size:
                 if signed:
                     if int(disp.arg) != sign_ext(int(value), admode, disp.size):
@@ -2581,7 +2581,7 @@ class bs_cl1(bsi, m_arg):
         if v == 1:
             self.expr = regs08_expr[1]
         else:
-            self.expr = ExprInt8(1)
+            self.expr = ExprInt(1, 8)
         return True
 
     def encode(self):
@@ -3069,7 +3069,7 @@ class bs_msegoff(m_arg):
         opmode = self.parent.v_opmode()
         v = swap_uint(self.l, v)
         self.value = v
-        v = ExprInt16(v)
+        v = ExprInt(v, 16)
         self.expr = ExprOp('segm', v, self.parent.off.expr)
         return True
 
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py
index 729806b5..98866e65 100644
--- a/miasm2/arch/x86/sem.py
+++ b/miasm2/arch/x86/sem.py
@@ -673,7 +673,7 @@ def cli(_, instr):
 
 
 def sti(_, instr):
-    e = [m2_expr.ExprAff(exception_flags, m2_expr.ExprInt32(EXCEPT_PRIV_INSN))]
+    e = [m2_expr.ExprAff(exception_flags, m2_expr.ExprInt(EXCEPT_PRIV_INSN, 32))]
     return e, []
 
 
@@ -1009,13 +1009,13 @@ def scas(ir, instr, size):
 def compose_eflag(s=32):
     args = []
 
-    args = [cf, m2_expr.ExprInt1(1), pf, m2_expr.ExprInt1(0), af,
-            m2_expr.ExprInt1(0), zf, nf, tf, i_f, df, of, iopl]
+    args = [cf, m2_expr.ExprInt(1, 1), pf, m2_expr.ExprInt(0, 1), af,
+            m2_expr.ExprInt(0, 1), zf, nf, tf, i_f, df, of, iopl]
 
     if s == 32:
-        args += [nt, m2_expr.ExprInt1(0), rf, vm, ac, vif, vip, i_d]
+        args += [nt, m2_expr.ExprInt(0, 1), rf, vm, ac, vif, vip, i_d]
     elif s == 16:
-        args += [nt, m2_expr.ExprInt1(0)]
+        args += [nt, m2_expr.ExprInt(0, 1)]
     else:
         raise ValueError('unk size')
     if s == 32:
@@ -1059,8 +1059,8 @@ def popfd(ir, instr):
                              mRSP[instr.mode] + m2_expr.ExprInt(instr.mode / 8, mRSP[instr.mode].size)))
     e.append(m2_expr.ExprAff(exception_flags,
                              m2_expr.ExprCond(m2_expr.ExprSlice(tmp, 8, 9),
-                                              m2_expr.ExprInt32(
-                                                  EXCEPT_SOFT_BP),
+                                              m2_expr.ExprInt(
+                                                  EXCEPT_SOFT_BP, 32),
                                               exception_flags
                                               )
                              )
@@ -1406,9 +1406,9 @@ def loopne(ir, instr, dst):
     n = m2_expr.ExprId(ir.get_next_label(instr), ir.IRDst.size)
 
     c = m2_expr.ExprCond(myecx - m2_expr.ExprInt(1, size=myecx.size),
-                         m2_expr.ExprInt1(1),
-                         m2_expr.ExprInt1(0))
-    c &= zf ^ m2_expr.ExprInt1(1)
+                         m2_expr.ExprInt(1, 1),
+                         m2_expr.ExprInt(0, 1))
+    c &= zf ^ m2_expr.ExprInt(1, 1)
 
     e.append(m2_expr.ExprAff(myecx, myecx - m2_expr.ExprInt(1, myecx.size)))
     dst_o = m2_expr.ExprCond(c,
@@ -1427,8 +1427,8 @@ def loope(ir, instr, dst):
 
     n = m2_expr.ExprId(ir.get_next_label(instr), ir.IRDst.size)
     c = m2_expr.ExprCond(myecx - m2_expr.ExprInt(1, size=myecx.size),
-                         m2_expr.ExprInt1(1),
-                         m2_expr.ExprInt1(0))
+                         m2_expr.ExprInt(1, 1),
+                         m2_expr.ExprInt(0, 1))
     c &= zf
     e.append(m2_expr.ExprAff(myecx, myecx - m2_expr.ExprInt(1, myecx.size)))
     dst_o = m2_expr.ExprCond(c,
@@ -1512,11 +1512,11 @@ def mul(_, instr, src1):
         raise ValueError('unknow size')
 
     e.append(m2_expr.ExprAff(of, m2_expr.ExprCond(result[size:size * 2],
-                                                  m2_expr.ExprInt1(1),
-                                                  m2_expr.ExprInt1(0))))
+                                                  m2_expr.ExprInt(1, 1),
+                                                  m2_expr.ExprInt(0, 1))))
     e.append(m2_expr.ExprAff(cf, m2_expr.ExprCond(result[size:size * 2],
-                                                  m2_expr.ExprInt1(1),
-                                                  m2_expr.ExprInt1(0))))
+                                                  m2_expr.ExprInt(1, 1),
+                                                  m2_expr.ExprInt(0, 1))))
 
     return e, []
 
@@ -1539,12 +1539,12 @@ def imul(_, instr, src1, src2=None, src3=None):
 
             e.append(m2_expr.ExprAff(dst, result))
         value = m2_expr.ExprCond(result - result[:size].signExtend(size * 2),
-                                 m2_expr.ExprInt1(1),
-                                 m2_expr.ExprInt1(0))
+                                 m2_expr.ExprInt(1, 1),
+                                 m2_expr.ExprInt(0, 1))
         e.append(m2_expr.ExprAff(cf, value))
         value = m2_expr.ExprCond(result - result[:size].signExtend(size * 2),
-                                 m2_expr.ExprInt1(1),
-                                 m2_expr.ExprInt1(0))
+                                 m2_expr.ExprInt(1, 1),
+                                 m2_expr.ExprInt(0, 1))
         e.append(m2_expr.ExprAff(of, value))
 
     else:
@@ -1557,12 +1557,12 @@ def imul(_, instr, src1, src2=None, src3=None):
         e.append(m2_expr.ExprAff(src1, result[:size]))
 
         value = m2_expr.ExprCond(result - result[:size].signExtend(size * 2),
-                                 m2_expr.ExprInt1(1),
-                                 m2_expr.ExprInt1(0))
+                                 m2_expr.ExprInt(1, 1),
+                                 m2_expr.ExprInt(0, 1))
         e.append(m2_expr.ExprAff(cf, value))
         value = m2_expr.ExprCond(result - result[:size].signExtend(size * 2),
-                                 m2_expr.ExprInt1(1),
-                                 m2_expr.ExprInt1(0))
+                                 m2_expr.ExprInt(1, 1),
+                                 m2_expr.ExprInt(0, 1))
         e.append(m2_expr.ExprAff(of, value))
     return e, []
 
@@ -1808,7 +1808,7 @@ def ftst(_, instr):
     dst = float_st0
 
     e = []
-    src = m2_expr.ExprOp('int_32_to_double', m2_expr.ExprInt32(0))
+    src = m2_expr.ExprOp('int_32_to_double', m2_expr.ExprInt(0, 32))
     e.append(m2_expr.ExprAff(float_c0, m2_expr.ExprOp('fcom_c0', dst, src)))
     e.append(m2_expr.ExprAff(float_c1, m2_expr.ExprOp('fcom_c1', dst, src)))
     e.append(m2_expr.ExprAff(float_c2, m2_expr.ExprOp('fcom_c2', dst, src)))
@@ -1868,9 +1868,9 @@ def fcomi(_, instr, dst=None, src=None):
     e.append(m2_expr.ExprAff(pf, m2_expr.ExprOp('fcom_c2', dst, src)))
     e.append(m2_expr.ExprAff(zf, m2_expr.ExprOp('fcom_c3', dst, src)))
 
-    e.append(m2_expr.ExprAff(of, m2_expr.ExprInt1(0)))
-    e.append(m2_expr.ExprAff(nf, m2_expr.ExprInt1(0)))
-    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt1(0)))
+    e.append(m2_expr.ExprAff(of, m2_expr.ExprInt(0, 1)))
+    e.append(m2_expr.ExprAff(nf, m2_expr.ExprInt(0, 1)))
+    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt(0, 1)))
 
     e += set_float_cs_eip(instr)
     return e, []
@@ -1941,9 +1941,9 @@ def comiss(_, instr, dst, src):
     e.append(m2_expr.ExprAff(pf, m2_expr.ExprOp('fcom_c2', dst, src)))
     e.append(m2_expr.ExprAff(zf, m2_expr.ExprOp('fcom_c3', dst, src)))
 
-    e.append(m2_expr.ExprAff(of, m2_expr.ExprInt1(0)))
-    e.append(m2_expr.ExprAff(nf, m2_expr.ExprInt1(0)))
-    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt1(0)))
+    e.append(m2_expr.ExprAff(of, m2_expr.ExprInt(0, 1)))
+    e.append(m2_expr.ExprAff(nf, m2_expr.ExprInt(0, 1)))
+    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt(0, 1)))
 
     e += set_float_cs_eip(instr)
     return e, []
@@ -1961,9 +1961,9 @@ def comisd(_, instr, dst, src):
     e.append(m2_expr.ExprAff(pf, m2_expr.ExprOp('fcom_c2', dst, src)))
     e.append(m2_expr.ExprAff(zf, m2_expr.ExprOp('fcom_c3', dst, src)))
 
-    e.append(m2_expr.ExprAff(of, m2_expr.ExprInt1(0)))
-    e.append(m2_expr.ExprAff(nf, m2_expr.ExprInt1(0)))
-    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt1(0)))
+    e.append(m2_expr.ExprAff(of, m2_expr.ExprInt(0, 1)))
+    e.append(m2_expr.ExprAff(nf, m2_expr.ExprInt(0, 1)))
+    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt(0, 1)))
 
     e += set_float_cs_eip(instr)
     return e, []
@@ -2064,47 +2064,47 @@ def fild(ir, instr, src):
 
 def fldz(ir, instr):
     return fld(ir, instr, m2_expr.ExprOp('int_32_to_double',
-                                         m2_expr.ExprInt32(0)))
+                                         m2_expr.ExprInt(0, 32)))
 
 
 def fld1(ir, instr):
     return fld(ir, instr, m2_expr.ExprOp('int_32_to_double',
-                                         m2_expr.ExprInt32(1)))
+                                         m2_expr.ExprInt(1, 32)))
 
 
 def fldl2t(ir, instr):
     value_f = math.log(10) / math.log(2)
     value = struct.unpack('I', struct.pack('f', value_f))[0]
     return fld(ir, instr, m2_expr.ExprOp('int_32_to_double',
-                                         m2_expr.ExprInt32(value)))
+                                         m2_expr.ExprInt(value, 32)))
 
 
 def fldpi(ir, instr):
     value_f = math.pi
     value = struct.unpack('I', struct.pack('f', value_f))[0]
     return fld(ir, instr, m2_expr.ExprOp('int_32_to_double',
-                                         m2_expr.ExprInt32(value)))
+                                         m2_expr.ExprInt(value, 32)))
 
 
 def fldln2(ir, instr):
     value_f = math.log(2)
     value = struct.unpack('Q', struct.pack('d', value_f))[0]
     return fld(ir, instr, m2_expr.ExprOp('mem_64_to_double',
-                                         m2_expr.ExprInt64(value)))
+                                         m2_expr.ExprInt(value, 64)))
 
 
 def fldl2e(ir, instr):
     x = struct.pack('d', 1 / math.log(2))
     x = struct.unpack('Q', x)[0]
     return fld(ir, instr, m2_expr.ExprOp('mem_64_to_double',
-                                         m2_expr.ExprInt64(x)))
+                                         m2_expr.ExprInt(x, 64)))
 
 
 def fldlg2(ir, instr):
     x = struct.pack('d', math.log10(2))
     x = struct.unpack('Q', x)[0]
     return fld(ir, instr, m2_expr.ExprOp('mem_64_to_double',
-                                         m2_expr.ExprInt64(x)))
+                                         m2_expr.ExprInt(x, 64)))
 
 
 def fadd(_, instr, dst, src=None):
@@ -2164,7 +2164,7 @@ def fprem(_, instr):
           m2_expr.ExprAff(float_c3, remain[1:2]),
           m2_expr.ExprAff(float_c1, remain[0:1]),
           # Consider the reduction is always completed
-          m2_expr.ExprAff(float_c2, m2_expr.ExprInt1(0)),
+          m2_expr.ExprAff(float_c2, m2_expr.ExprInt(0, 1)),
           ]
     e += set_float_cs_eip(instr)
     return e, []
@@ -2207,10 +2207,10 @@ def fyl2x(_, instr):
 def fnstenv(ir, instr, dst):
     e = []
     # XXX TODO tag word, ...
-    status_word = m2_expr.ExprCompose(m2_expr.ExprInt8(0),
+    status_word = m2_expr.ExprCompose(m2_expr.ExprInt(0, 8),
                                       float_c0, float_c1, float_c2,
                                       float_stack_ptr, float_c3,
-                                      m2_expr.ExprInt1(0))
+                                      m2_expr.ExprInt(0, 1))
 
     s = instr.mode
     # The behaviour in 64bit is identical to 32 bit
@@ -2424,7 +2424,7 @@ def fptan(_, instr):
     e.append(m2_expr.ExprAff(float_st1, m2_expr.ExprOp('ftan', float_st0)))
     e.append(m2_expr.ExprAff(float_st0,
                              m2_expr.ExprOp('int_32_to_double',
-                                            m2_expr.ExprInt32(1))))
+                                            m2_expr.ExprInt(1, 32))))
     e.append(
         m2_expr.ExprAff(float_stack_ptr,
                         float_stack_ptr + m2_expr.ExprInt(1, 3)))
@@ -2507,14 +2507,14 @@ def fabs(_, instr):
 def fnstsw(_, instr, dst):
     args = [
         # Exceptions -> 0
-        m2_expr.ExprInt8(0),
+        m2_expr.ExprInt(0, 8),
         float_c0,
         float_c1,
         float_c2,
         float_stack_ptr,
         float_c3,
         # B: FPU is not busy -> 0
-        m2_expr.ExprInt1(0)]
+        m2_expr.ExprInt(0, 1)]
     e = [m2_expr.ExprAff(dst, m2_expr.ExprCompose(*args))]
     return e, []
 
@@ -2592,17 +2592,16 @@ def ud2(_, instr, src=None):
 def hlt(_, instr):
     e = []
     except_int = EXCEPT_PRIV_INSN
-    e.append(m2_expr.ExprAff(exception_flags, m2_expr.ExprInt32(except_int)))
+    e.append(m2_expr.ExprAff(exception_flags, m2_expr.ExprInt(except_int, 32)))
     return e, []
 
 
 def rdtsc(_, instr):
     e = []
-    e.append(m2_expr.ExprAff(tsc1, tsc1 + m2_expr.ExprInt32(1)))
+    e.append(m2_expr.ExprAff(tsc1, tsc1 + m2_expr.ExprInt(1, 32)))
     e.append(m2_expr.ExprAff(tsc2, tsc2 + m2_expr.ExprCond(tsc1 - tsc1.mask,
-                                                           m2_expr.ExprInt32(
-                                                               0),
-                                                           m2_expr.ExprInt32(1))))
+                                                           m2_expr.ExprInt(0, 32),
+                                                           m2_expr.ExprInt(1, 32))))
     e.append(m2_expr.ExprAff(mRAX[32], tsc1))
     e.append(m2_expr.ExprAff(mRDX[32], tsc2))
     return e, []
@@ -2615,23 +2614,23 @@ def daa(_, instr):
     cond1 = expr_cmpu(r_al[:4], m2_expr.ExprInt(0x9, 4)) | af
     e.append(m2_expr.ExprAff(af, cond1))
 
-    cond2 = expr_cmpu(m2_expr.ExprInt8(6), r_al)
-    cond3 = expr_cmpu(r_al, m2_expr.ExprInt8(0x99)) | cf
+    cond2 = expr_cmpu(m2_expr.ExprInt(6, 8), r_al)
+    cond3 = expr_cmpu(r_al, m2_expr.ExprInt(0x99, 8)) | cf
 
     cf_c1 = m2_expr.ExprCond(cond1,
                              cf | (cond2),
-                             m2_expr.ExprInt1(0))
+                             m2_expr.ExprInt(0, 1))
     new_cf = m2_expr.ExprCond(cond3,
-                              m2_expr.ExprInt1(1),
-                              m2_expr.ExprInt1(0))
+                              m2_expr.ExprInt(1, 1),
+                              m2_expr.ExprInt(0, 1))
     e.append(m2_expr.ExprAff(cf, new_cf))
 
     al_c1 = m2_expr.ExprCond(cond1,
-                             r_al + m2_expr.ExprInt8(6),
+                             r_al + m2_expr.ExprInt(6, 8),
                              r_al)
 
     new_al = m2_expr.ExprCond(cond3,
-                              al_c1 + m2_expr.ExprInt8(0x60),
+                              al_c1 + m2_expr.ExprInt(0x60, 8),
                               al_c1)
     e.append(m2_expr.ExprAff(r_al, new_al))
     e += update_flag_znp(new_al)
@@ -2645,23 +2644,23 @@ def das(_, instr):
     cond1 = expr_cmpu(r_al[:4], m2_expr.ExprInt(0x9, 4)) | af
     e.append(m2_expr.ExprAff(af, cond1))
 
-    cond2 = expr_cmpu(m2_expr.ExprInt8(6), r_al)
-    cond3 = expr_cmpu(r_al, m2_expr.ExprInt8(0x99)) | cf
+    cond2 = expr_cmpu(m2_expr.ExprInt(6, 8), r_al)
+    cond3 = expr_cmpu(r_al, m2_expr.ExprInt(0x99, 8)) | cf
 
     cf_c1 = m2_expr.ExprCond(cond1,
                              cf | (cond2),
-                             m2_expr.ExprInt1(0))
+                             m2_expr.ExprInt(0, 1))
     new_cf = m2_expr.ExprCond(cond3,
-                              m2_expr.ExprInt1(1),
+                              m2_expr.ExprInt(1, 1),
                               cf_c1)
     e.append(m2_expr.ExprAff(cf, new_cf))
 
     al_c1 = m2_expr.ExprCond(cond1,
-                             r_al - m2_expr.ExprInt8(6),
+                             r_al - m2_expr.ExprInt(6, 8),
                              r_al)
 
     new_al = m2_expr.ExprCond(cond3,
-                              al_c1 - m2_expr.ExprInt8(0x60),
+                              al_c1 - m2_expr.ExprInt(0x60, 8),
                               al_c1)
     e.append(m2_expr.ExprAff(r_al, new_al))
     e += update_flag_znp(new_al)
@@ -2676,7 +2675,7 @@ def aam(_, instr, src):
                                  mRAX[instr.mode][16:])
     e += [m2_expr.ExprAff(mRAX[instr.mode], newEAX)]
     e += update_flag_arith(newEAX)
-    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt1(0)))
+    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt(0, 1)))
     return e, []
 
 
@@ -2684,12 +2683,12 @@ def aad(_, instr, src):
     e = []
     tempAL = mRAX[instr.mode][0:8]
     tempAH = mRAX[instr.mode][8:16]
-    newEAX = m2_expr.ExprCompose((tempAL + (tempAH * src)) & m2_expr.ExprInt8(0xFF),
-                                 m2_expr.ExprInt8(0),
+    newEAX = m2_expr.ExprCompose((tempAL + (tempAH * src)) & m2_expr.ExprInt(0xFF, 8),
+                                 m2_expr.ExprInt(0, 8),
                                  mRAX[instr.mode][16:])
     e += [m2_expr.ExprAff(mRAX[instr.mode], newEAX)]
     e += update_flag_arith(newEAX)
-    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt1(0)))
+    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt(0, 1)))
     return e, []
 
 
@@ -2701,10 +2700,10 @@ def _tpl_aaa(_, instr, op):
     r_al = mRAX[instr.mode][:8]
     r_ah = mRAX[instr.mode][8:16]
     r_ax = mRAX[instr.mode][:16]
-    i0 = m2_expr.ExprInt1(0)
-    i1 = m2_expr.ExprInt1(1)
+    i0 = m2_expr.ExprInt(0, 1)
+    i1 = m2_expr.ExprInt(1, 1)
     # cond: if (al & 0xf) > 9 OR af == 1
-    cond = (r_al & m2_expr.ExprInt8(0xf)) - m2_expr.ExprInt8(9)
+    cond = (r_al & m2_expr.ExprInt(0xf, 8)) - m2_expr.ExprInt(9, 8)
     cond = ~cond.msb() & m2_expr.ExprCond(cond, i1, i0)
     cond |= af & i1
 
@@ -2772,13 +2771,13 @@ def bsr(ir, instr, dst, src):
 
 def arpl(_, instr, dst, src):
     e = []
-    e.append(m2_expr.ExprAff(exception_flags, m2_expr.ExprInt32(1 << 7)))
+    e.append(m2_expr.ExprAff(exception_flags, m2_expr.ExprInt(1 << 7, 32)))
     return e, []
 
 
 def ins(_, instr, size):
     e = []
-    e.append(m2_expr.ExprAff(exception_flags, m2_expr.ExprInt32(1 << 7)))
+    e.append(m2_expr.ExprAff(exception_flags, m2_expr.ExprInt(1 << 7, 32)))
     return e, []
 
 
@@ -2789,10 +2788,10 @@ def sidt(ir, instr, dst):
     ptr = dst.arg
     print "DEFAULT SIDT ADDRESS %s!!" % str(dst)
     e.append(m2_expr.ExprAff(ir.ExprMem(ptr, 32),
-                             m2_expr.ExprInt32(0xe40007ff)))
+                             m2_expr.ExprInt(0xe40007ff, 32)))
     e.append(
         m2_expr.ExprAff(ir.ExprMem(ptr + m2_expr.ExprInt(4, ptr.size), 16),
-                        m2_expr.ExprInt16(0x8245)))
+                        m2_expr.ExprInt(0x8245, 16)))
     return e, []
 
 
@@ -2869,7 +2868,7 @@ def cmovns(ir, instr, dst, src):
 def icebp(_, instr):
     e = []
     e.append(m2_expr.ExprAff(exception_flags,
-                             m2_expr.ExprInt32(EXCEPT_SOFT_BP)))
+                             m2_expr.ExprInt(EXCEPT_SOFT_BP, 32)))
     return e, []
 # XXX
 
@@ -2882,7 +2881,7 @@ def l_int(_, instr, src):
     else:
         except_int = EXCEPT_INT_XX
     e.append(m2_expr.ExprAff(exception_flags,
-                             m2_expr.ExprInt32(except_int)))
+                             m2_expr.ExprInt(except_int, 32)))
     e.append(m2_expr.ExprAff(interrupt_num, src))
     return e, []
 
@@ -2890,14 +2889,14 @@ def l_int(_, instr, src):
 def l_sysenter(_, instr):
     e = []
     e.append(m2_expr.ExprAff(exception_flags,
-                             m2_expr.ExprInt32(EXCEPT_PRIV_INSN)))
+                             m2_expr.ExprInt(EXCEPT_PRIV_INSN, 32)))
     return e, []
 
 
 def l_syscall(_, instr):
     e = []
     e.append(m2_expr.ExprAff(exception_flags,
-                             m2_expr.ExprInt32(EXCEPT_PRIV_INSN)))
+                             m2_expr.ExprInt(EXCEPT_PRIV_INSN, 32)))
     return e, []
 
 # XXX
@@ -2906,7 +2905,7 @@ def l_syscall(_, instr):
 def l_out(_, instr, src1, src2):
     e = []
     e.append(m2_expr.ExprAff(exception_flags,
-                             m2_expr.ExprInt32(EXCEPT_PRIV_INSN)))
+                             m2_expr.ExprInt(EXCEPT_PRIV_INSN, 32)))
     return e, []
 
 # XXX
@@ -2915,7 +2914,7 @@ def l_out(_, instr, src1, src2):
 def l_outs(_, instr, size):
     e = []
     e.append(m2_expr.ExprAff(exception_flags,
-                             m2_expr.ExprInt32(EXCEPT_PRIV_INSN)))
+                             m2_expr.ExprInt(EXCEPT_PRIV_INSN, 32)))
     return e, []
 
 # XXX actually, xlat performs al = (ds:[e]bx + ZeroExtend(al))
@@ -3020,7 +3019,7 @@ def into(_, instr):
 def l_in(_, instr, src1, src2):
     e = []
     e.append(m2_expr.ExprAff(exception_flags,
-                             m2_expr.ExprInt32(EXCEPT_PRIV_INSN)))
+                             m2_expr.ExprInt(EXCEPT_PRIV_INSN, 32)))
     return e, []
 
 
@@ -3094,8 +3093,8 @@ def lgs(ir, instr, dst, src):
 
 def lahf(_, instr):
     e = []
-    args = [cf, m2_expr.ExprInt1(1), pf, m2_expr.ExprInt1(0), af,
-            m2_expr.ExprInt1(0), zf, nf]
+    args = [cf, m2_expr.ExprInt(1, 1), pf, m2_expr.ExprInt(0, 1), af,
+            m2_expr.ExprInt(0, 1), zf, nf]
     e.append(
         m2_expr.ExprAff(mRAX[instr.mode][8:16], m2_expr.ExprCompose(*args)))
     return e, []
@@ -3139,7 +3138,7 @@ def fnclex(_, instr):
 def l_str(_, instr, dst):
     e = []
     e.append(m2_expr.ExprAff(dst, m2_expr.ExprOp('load_tr_segment_selector',
-                                                 m2_expr.ExprInt32(0))))
+                                                 m2_expr.ExprInt(0, 32))))
     return e, []
 
 
@@ -3147,7 +3146,7 @@ def movd(_, instr, dst, src):
     e = []
     if dst in regs_mm_expr:
         e.append(m2_expr.ExprAff(
-            dst, m2_expr.ExprCompose(src, m2_expr.ExprInt32(0))))
+            dst, m2_expr.ExprCompose(src, m2_expr.ExprInt(0, 32))))
     elif dst in regs_xmm_expr:
         e.append(m2_expr.ExprAff(
             dst, m2_expr.ExprCompose(src, m2_expr.ExprInt(0, 96))))
@@ -3191,7 +3190,8 @@ def xorps(_, instr, dst, src):
 
 
 def rdmsr(ir, instr):
-    msr_addr = m2_expr.ExprId('MSR') + m2_expr.ExprInt32(
+    msr_addr = m2_expr.ExprId('MSR') + m2_expr.ExprInt(
+        0,
         8) * mRCX[instr.mode][:32]
     e = []
     e.append(
@@ -3202,8 +3202,9 @@ def rdmsr(ir, instr):
 
 
 def wrmsr(ir, instr):
-    msr_addr = m2_expr.ExprId('MSR') + m2_expr.ExprInt32(
-        8) * mRCX[instr.mode][:32]
+    msr_addr = m2_expr.ExprId('MSR') + m2_expr.ExprInt(
+        8,
+        32) * mRCX[instr.mode][:32]
     e = []
     src = m2_expr.ExprCompose(mRAX[instr.mode][:32], mRDX[instr.mode][:32])
     e.append(m2_expr.ExprAff(ir.ExprMem(msr_addr, 64), src))
@@ -3392,7 +3393,7 @@ def cvtpd2dq(_, instr, dst, src):
         m2_expr.ExprAff(dst[:32], m2_expr.ExprOp('double_to_int_32', src[:64])))
     e.append(
         m2_expr.ExprAff(dst[32:64], m2_expr.ExprOp('double_to_int_32', src[64:128])))
-    e.append(m2_expr.ExprAff(dst[64:128], m2_expr.ExprInt64(0)))
+    e.append(m2_expr.ExprAff(dst[64:128], m2_expr.ExprInt(0, 64)))
     return e, []
 
 
@@ -3411,7 +3412,7 @@ def cvtpd2ps(_, instr, dst, src):
         m2_expr.ExprAff(dst[:32], m2_expr.ExprOp('double_to_float', src[:64])))
     e.append(
         m2_expr.ExprAff(dst[32:64], m2_expr.ExprOp('double_to_float', src[64:128])))
-    e.append(m2_expr.ExprAff(dst[64:128], m2_expr.ExprInt64(0)))
+    e.append(m2_expr.ExprAff(dst[64:128], m2_expr.ExprInt(0, 64)))
     return e, []
 
 
@@ -3521,7 +3522,7 @@ def cvttpd2dq(_, instr, dst, src):
         m2_expr.ExprAff(dst[:32], m2_expr.ExprOp('double_trunc_to_int_32', src[:64])))
     e.append(
         m2_expr.ExprAff(dst[32:64], m2_expr.ExprOp('double_trunc_to_int_32', src[64:128])))
-    e.append(m2_expr.ExprAff(dst[64:128], m2_expr.ExprInt64(0)))
+    e.append(m2_expr.ExprAff(dst[64:128], m2_expr.ExprInt(0, 64)))
     return e, []
 
 
@@ -3585,9 +3586,9 @@ def ucomiss(_, instr, src1, src2):
     e.append(m2_expr.ExprAff(cf, m2_expr.ExprOp(
         'ucomiss_cf', src1[:32], src2[:32])))
 
-    e.append(m2_expr.ExprAff(of, m2_expr.ExprInt1(0)))
-    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt1(0)))
-    e.append(m2_expr.ExprAff(nf, m2_expr.ExprInt1(0)))
+    e.append(m2_expr.ExprAff(of, m2_expr.ExprInt(0, 1)))
+    e.append(m2_expr.ExprAff(af, m2_expr.ExprInt(0, 1)))
+    e.append(m2_expr.ExprAff(nf, m2_expr.ExprInt(0, 1)))
 
     return e, []
 
@@ -3606,7 +3607,7 @@ def pshufb(_, instr, dst, src):
         value = (dst >> index)[:8]
         e.append(m2_expr.ExprAff(dst[i:i + 8],
                                  m2_expr.ExprCond(src[i + 7:i + 8],
-                                                  m2_expr.ExprInt8(0),
+                                                  m2_expr.ExprInt(0, 8),
                                                   value)))
     return e, []
 
@@ -4556,14 +4557,14 @@ class ir_x86_16(IntermediateRepresentation):
                 zf_val = e.src
 
         cond_dec = m2_expr.ExprCond(c_reg - m2_expr.ExprInt(1, c_reg.size),
-                                    m2_expr.ExprInt1(0), m2_expr.ExprInt1(1))
+                                    m2_expr.ExprInt(0, 1), m2_expr.ExprInt(1, 1))
         # end condition
         if zf_val is None:
             c_cond = cond_dec
         elif instr.additional_info.g1.value & 2:  # REPNE
             c_cond = cond_dec | zf
         elif instr.additional_info.g1.value & 4:  # REP
-            c_cond = cond_dec | (zf ^ m2_expr.ExprInt1(1))
+            c_cond = cond_dec | (zf ^ m2_expr.ExprInt(1, 1))
 
         # gen while
         lbl_do = m2_expr.ExprId(self.gen_label(), self.IRDst.size)
@@ -4652,17 +4653,17 @@ class ir_x86_64(ir_x86_16):
             dst, src = expr.dst, expr.src
             if dst != self.pc:
                 dst = dst.replace_expr(
-                    {self.pc: m2_expr.ExprInt64(instr.offset + instr.l)})
+                    {self.pc: m2_expr.ExprInt(instr.offset + instr.l, 64)})
             src = src.replace_expr(
-                {self.pc: m2_expr.ExprInt64(instr.offset + instr.l)})
+                {self.pc: m2_expr.ExprInt(instr.offset + instr.l, 64)})
             instr_ir[i] = m2_expr.ExprAff(dst, src)
         for irblock in extra_ir:
             for irs in irblock.irs:
                 for i, expr in enumerate(irs):
                     dst, src = expr.dst, expr.src
                     if dst != self.pc:
-                        new_pc = m2_expr.ExprInt64(instr.offset + instr.l)
+                        new_pc = m2_expr.ExprInt(instr.offset + instr.l, 64)
                         dst = dst.replace_expr({self.pc: new_pc})
                     src = src.replace_expr(
-                        {self.pc: m2_expr.ExprInt64(instr.offset + instr.l)})
+                        {self.pc: m2_expr.ExprInt(instr.offset + instr.l, 64)})
                     irs[i] = m2_expr.ExprAff(dst, src)
diff --git a/miasm2/core/cpu.py b/miasm2/core/cpu.py
index 8b906027..3502397d 100644
--- a/miasm2/core/cpu.py
+++ b/miasm2/core/cpu.py
@@ -196,7 +196,7 @@ def ast_id2expr(a):
 
 
 def ast_int2expr(a):
-    return m2_expr.ExprInt32(a)
+    return m2_expr.ExprInt(a, 32)
 
 
 
@@ -1558,19 +1558,19 @@ class imm_noarg(object):
 
 
 class imm08_noarg(object):
-    int2expr = lambda self, x: m2_expr.ExprInt08(x)
+    int2expr = lambda self, x: m2_expr.ExprInt(x, 8)
 
 
 class imm16_noarg(object):
-    int2expr = lambda self, x: m2_expr.ExprInt16(x)
+    int2expr = lambda self, x: m2_expr.ExprInt(x, 16)
 
 
 class imm32_noarg(object):
-    int2expr = lambda self, x: m2_expr.ExprInt32(x)
+    int2expr = lambda self, x: m2_expr.ExprInt(x, 32)
 
 
 class imm64_noarg(object):
-    int2expr = lambda self, x: m2_expr.ExprInt64(x)
+    int2expr = lambda self, x: m2_expr.ExprInt(x, 64)
 
 
 class int32_noarg(imm_noarg):
diff --git a/miasm2/expression/expression.py b/miasm2/expression/expression.py
index ead881ee..85471e05 100644
--- a/miasm2/expression/expression.py
+++ b/miasm2/expression/expression.py
@@ -30,7 +30,8 @@
 
 import itertools
 from operator import itemgetter
-from miasm2.expression.modint import mod_size2uint, is_modint, size2mask
+from miasm2.expression.modint import mod_size2uint, is_modint, size2mask, \
+    define_uint
 from miasm2.core.graph import DiGraph
 import warnings
 
@@ -462,7 +463,7 @@ class ExprInt(Expr):
         return self
 
     def copy(self):
-        return ExprInt(self.__arg)
+        return ExprInt(self.__arg, self.__size)
 
     def depth(self):
         return 1
diff --git a/miasm2/expression/expression_helper.py b/miasm2/expression/expression_helper.py
index 36e5f1d5..1e718faa 100644
--- a/miasm2/expression/expression_helper.py
+++ b/miasm2/expression/expression_helper.py
@@ -521,7 +521,7 @@ class CondConstraintNotZero(CondConstraint):
     operator = "!="
 
     def to_constraint(self):
-        cst1, cst2 = m2_expr.ExprInt1(0), m2_expr.ExprInt1(1)
+        cst1, cst2 = m2_expr.ExprInt(0, 1), m2_expr.ExprInt(1, 1)
         return m2_expr.ExprAff(cst1, m2_expr.ExprCond(self.expr, cst1, cst2))
 
 
diff --git a/miasm2/expression/modint.py b/miasm2/expression/modint.py
index b6a0e4ee..51a2620e 100644
--- a/miasm2/expression/modint.py
+++ b/miasm2/expression/modint.py
@@ -224,7 +224,7 @@ def define_uint(size):
     return cls
 
 def define_common_int():
-    "Define common int: ExprInt1, ExprInt2, .."
+    "Define common int"
     common_int = xrange(1, 257)
 
     for i in common_int:
diff --git a/miasm2/expression/simplifications_common.py b/miasm2/expression/simplifications_common.py
index c9b7932a..01db7597 100644
--- a/miasm2/expression/simplifications_common.py
+++ b/miasm2/expression/simplifications_common.py
@@ -238,7 +238,7 @@ def simp_cst_propagation(e_s, e):
 
     # parity(int) => int
     if op == 'parity' and args[0].is_int():
-        return ExprInt1(parity(int(args[0])))
+        return ExprInt(parity(int(args[0])), 1)
 
     # (-a) * b * (-c) * (-d) => (-a) * b * c * d
     if op == "*" and len(args) > 1:
@@ -581,8 +581,8 @@ def simp_cond(e_s, e):
     # eval exprcond src1/src2 with satifiable/unsatisfiable condition
     # propagation
     if (not e.cond.is_int()) and e.cond.size == 1:
-        src1 = e.src1.replace_expr({e.cond: ExprInt1(1)})
-        src2 = e.src2.replace_expr({e.cond: ExprInt1(0)})
+        src1 = e.src1.replace_expr({e.cond: ExprInt(1, 1)})
+        src2 = e.src2.replace_expr({e.cond: ExprInt(0, 1)})
         if src1 != e.src1 or src2 != e.src2:
             return ExprCond(e.cond, src1, src2)
 
diff --git a/miasm2/expression/simplifications_cond.py b/miasm2/expression/simplifications_cond.py
index 03bf6166..0d194d9a 100644
--- a/miasm2/expression/simplifications_cond.py
+++ b/miasm2/expression/simplifications_cond.py
@@ -169,7 +169,7 @@ def expr_simp_inverse(expr_simp, e):
 def expr_simp_equal(expr_simp, e):
     """(x - y)?(0:1) == (x == y)"""
 
-    to_match = m2_expr.ExprCond(jok1 + jok2, m2_expr.ExprInt1(0), m2_expr.ExprInt1(1))
+    to_match = m2_expr.ExprCond(jok1 + jok2, m2_expr.ExprInt(0, 1), m2_expr.ExprInt(1, 1))
     r = __MatchExprWrap(e,
                         to_match,
                         [jok1, jok2])
@@ -188,13 +188,13 @@ def exec_inf_unsigned(expr_simp, e):
     arg1, arg2 = e.args
 
     if isinstance(arg1, m2_expr.ExprInt) and isinstance(arg2, m2_expr.ExprInt):
-        return m2_expr.ExprInt1(1) if (arg1.arg < arg2.arg) else m2_expr.ExprInt1(0)
+        return m2_expr.ExprInt(1, 1) if (arg1.arg < arg2.arg) else m2_expr.ExprInt(0, 1)
     else:
         return e
 
 
 def __comp_signed(arg1, arg2):
-    """Return ExprInt1(1) if arg1 <s arg2 else ExprInt1(0)
+    """Return ExprInt(1, 1) if arg1 <s arg2 else ExprInt(0, 1)
     @arg1, @arg2: ExprInt"""
 
     val1 = int(arg1)
@@ -205,7 +205,7 @@ def __comp_signed(arg1, arg2):
     if val2 >> (arg2.size - 1) == 1:
         val2 = - ((int(arg2.mask) ^ val2) + 1)
 
-    return m2_expr.ExprInt1(1) if (val1 < val2) else m2_expr.ExprInt1(0)
+    return m2_expr.ExprInt(1, 1) if (val1 < val2) else m2_expr.ExprInt(0, 1)
 
 def exec_inf_signed(expr_simp, e):
     "Compute x <s y"
@@ -228,6 +228,6 @@ def exec_equal(expr_simp, e):
 
     arg1, arg2 = e.args
     if isinstance(arg1, m2_expr.ExprInt) and isinstance(arg2, m2_expr.ExprInt):
-        return m2_expr.ExprInt1(1) if (arg1.arg == arg2.arg) else m2_expr.ExprInt1(0)
+        return m2_expr.ExprInt(1, 1) if (arg1.arg == arg2.arg) else m2_expr.ExprInt(0, 1)
     else:
         return e
diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py
index 226a1b8e..85000935 100644
--- a/miasm2/jitter/llvmconvert.py
+++ b/miasm2/jitter/llvmconvert.py
@@ -945,7 +945,7 @@ class LLVMFunction():
         if isinstance(offset, (int, long)):
             offset = self.add_ir(m2_expr.ExprInt(offset, PC.size))
         self.affect(offset, PC)
-        self.affect(self.add_ir(m2_expr.ExprInt8(1)), m2_expr.ExprId("status"))
+        self.affect(self.add_ir(m2_expr.ExprInt(1, 8)), m2_expr.ExprId("status"))
         self.set_ret(offset)
 
         builder.position_at_end(merge_block)
@@ -992,7 +992,7 @@ class LLVMFunction():
         if isinstance(offset, (int, long)):
             offset = self.add_ir(m2_expr.ExprInt(offset, PC.size))
         self.affect(offset, PC)
-        self.affect(self.add_ir(m2_expr.ExprInt8(1)), m2_expr.ExprId("status"))
+        self.affect(self.add_ir(m2_expr.ExprInt(1, 8)), m2_expr.ExprId("status"))
         self.set_ret(offset)
 
         builder.position_at_end(merge_block)
@@ -1102,7 +1102,7 @@ class LLVMFunction():
         self.gen_post_code(attrib)
         self.affect(dst, PC)
         self.gen_post_instr_checks(attrib, dst)
-        self.affect(self.add_ir(m2_expr.ExprInt8(0)), m2_expr.ExprId("status"))
+        self.affect(self.add_ir(m2_expr.ExprInt(0, 8)), m2_expr.ExprId("status"))
         self.set_ret(dst)
 
 
@@ -1198,7 +1198,7 @@ class LLVMFunction():
         builder = self.builder
         m2_exception_flag = self.llvm_context.ir_arch.arch.regs.exception_flags
         t_size = LLVMType.IntType(m2_exception_flag.size)
-        self.affect(self.add_ir(m2_expr.ExprInt8(1)),
+        self.affect(self.add_ir(m2_expr.ExprInt(1, 8)),
                     m2_expr.ExprId("status"))
         self.affect(t_size(m2_csts.EXCEPT_UNK_MNEMO),
                     m2_exception_flag)
@@ -1216,7 +1216,7 @@ class LLVMFunction():
             builder.position_at_end(self.get_basic_bloc_by_label(next_label))
 
             # Common code
-            self.affect(self.add_ir(m2_expr.ExprInt8(0)),
+            self.affect(self.add_ir(m2_expr.ExprInt(0, 8)),
                         m2_expr.ExprId("status"))
 
             # Check if IRDst has been set
@@ -1240,7 +1240,7 @@ class LLVMFunction():
             PC = self.llvm_context.PC
             to_ret = self.add_ir(codegen.delay_slot_dst)
             self.affect(to_ret, PC)
-            self.affect(self.add_ir(m2_expr.ExprInt8(0)),
+            self.affect(self.add_ir(m2_expr.ExprInt(0, 8)),
                         m2_expr.ExprId("status"))
             self.set_ret(to_ret)
author	Ajax <commial@gmail.com>	2017-03-29 15:44:15 +0200
committer	Ajax <commial@gmail.com>	2017-03-30 16:04:40 +0200
commit	f81c3e4b42d0ce487101b8e0802e43b32b261b1d (patch)
tree	91fcd0b4317685bc4685acbb17affc3ec0f78afc /miasm2
parent	fd76e24c84825072ce18cab33fbcc496bd4d8d65 (diff)
download	miasm-f81c3e4b42d0ce487101b8e0802e43b32b261b1d.tar.gz miasm-f81c3e4b42d0ce487101b8e0802e43b32b261b1d.zip