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authorserpilliere <serpilliere@users.noreply.github.com>2020-05-21 15:39:40 +0200
committerGitHub <noreply@github.com>2020-05-21 15:39:40 +0200
commit6b08a069e830951d0d5baed292948bb4cbefc811 (patch)
tree83bf960d7c2a81ebeff44f291e3b90e7bcb54fb2 /test/arch/arm/arch.py
parent389c26c647dc65187f205834a79f1db03d855146 (diff)
parentb78b1616c28f9eed711842d9c435537e20f39a57 (diff)
downloadmiasm-6b08a069e830951d0d5baed292948bb4cbefc811.tar.gz
miasm-6b08a069e830951d0d5baed292948bb4cbefc811.zip
Merge pull request #1223 from IridiumXOR/arm_mmu
Implementation of all Coprocessor 15 registers in ARM
Diffstat (limited to '')
-rw-r--r--test/arch/arm/arch.py4
1 files changed, 4 insertions, 0 deletions
diff --git a/test/arch/arm/arch.py b/test/arch/arm/arch.py
index 5aa619ea..55b9a9c2 100644
--- a/test/arch/arm/arch.py
+++ b/test/arch/arm/arch.py
@@ -233,6 +233,10 @@ reg_tests_arm = [
     ('XXXXXXXX    PKHTB      R1, R2, R3 ASR 0x20',
      '531082e6'),
 
+    ('XXXXXXXX    MRC        p15, 0x0, R0, c1, c1, 0x0',
+     '110f11ee'),
+    ('XXXXXXXX    MCR        p15, 0x0, R8, c2, c0, 0x0',
+     '108f02ee'),
 
 ]
 ts = time.time()