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authorserpilliere <fabrice.desclaux@cea.fr>2016-04-25 22:12:45 +0200
committerFabrice Desclaux <fabrice.desclaux@cea.fr>2016-04-26 11:05:41 +0200
commit5dc6a1d5fef50253f98838db681f92d0071172f5 (patch)
tree314f4a3ca5b94694db7d71ac6e1fe4a10e39bf40 /test/arch/mips32/unit/asm_test.py
parent65cf848438651b3bfe01243778af9e6d5b0470d6 (diff)
downloadmiasm-5dc6a1d5fef50253f98838db681f92d0071172f5.tar.gz
miasm-5dc6a1d5fef50253f98838db681f92d0071172f5.zip
Test: TCC conditional tests
Diffstat (limited to 'test/arch/mips32/unit/asm_test.py')
-rw-r--r--test/arch/mips32/unit/asm_test.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/test/arch/mips32/unit/asm_test.py b/test/arch/mips32/unit/asm_test.py
index a00d0842..7272c15e 100644
--- a/test/arch/mips32/unit/asm_test.py
+++ b/test/arch/mips32/unit/asm_test.py
@@ -23,8 +23,8 @@ reg_and_id = dict(mn_mips32.regs.all_regs_ids_byname)
 
 class Asm_Test(object):
 
-    def __init__(self):
-        self.myjit = Machine("mips32l").jitter()
+    def __init__(self, jitter):
+        self.myjit = Machine("mips32l").jitter(jitter)
         self.myjit.init_stack()
 
         self.myjit.jit.log_regs = False