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authorAjax <commial@gmail.com>2018-05-17 10:52:40 +0200
committerAjax <commial@gmail.com>2018-05-17 10:52:40 +0200
commit23cee4aeb4d667b6ff93b279a8619acf56a70bc3 (patch)
tree37ec6ee8f5c153aa34f7476d76053578eb50a69d /test/arch/x86/unit/access_xmm.py
parent18ac4b21a484265ff50f400ad400a6f028038455 (diff)
downloadmiasm-23cee4aeb4d667b6ff93b279a8619acf56a70bc3.tar.gz
miasm-23cee4aeb4d667b6ff93b279a8619acf56a70bc3.zip
Add support for XMM0-15 registers in x86
Diffstat (limited to 'test/arch/x86/unit/access_xmm.py')
-rw-r--r--test/arch/x86/unit/access_xmm.py16
1 files changed, 16 insertions, 0 deletions
diff --git a/test/arch/x86/unit/access_xmm.py b/test/arch/x86/unit/access_xmm.py
new file mode 100644
index 00000000..950c8b56
--- /dev/null
+++ b/test/arch/x86/unit/access_xmm.py
@@ -0,0 +1,16 @@
+#! /usr/bin/env python2
+"""Test getter and setter for XMM registers (128 bits)"""
+
+from miasm2.analysis.machine import Machine
+
+# Jitter engine doesn't matter, use the always available 'python' one
+myjit = Machine("x86_32").jitter("python")
+
+# Test basic access (get)
+assert myjit.cpu.XMM0 == 0
+
+# Test set
+myjit.cpu.XMM1 = 0x00112233445566778899aabbccddeeffL
+
+# Ensure set has been correctly handled
+assert myjit.cpu.XMM1 == 0x00112233445566778899aabbccddeeffL