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authorserpilliere <serpilliere@users.noreply.github.com>2017-06-27 13:58:48 +0200
committerGitHub <noreply@github.com>2017-06-27 13:58:48 +0200
commit4202a41f13ad0968025c64d1a0481913f675880f (patch)
tree17d4f1e9112257ca1a3ee38e9471bf100f8061fc /test/arch/x86/unit/mn_div.py
parent4c1a445b1062cd154ed3fc11ed9887f94c008479 (diff)
parent04fc16be01be380b4b25d795f271c38e8dabc79f (diff)
downloadmiasm-4202a41f13ad0968025c64d1a0481913f675880f.tar.gz
miasm-4202a41f13ad0968025c64d1a0481913f675880f.zip
Merge pull request #573 from commial/feature/llvm-128div
Feature/llvm 128div
Diffstat (limited to '')
-rw-r--r--test/arch/x86/unit/mn_div.py17
1 files changed, 17 insertions, 0 deletions
diff --git a/test/arch/x86/unit/mn_div.py b/test/arch/x86/unit/mn_div.py
new file mode 100644
index 00000000..84569607
--- /dev/null
+++ b/test/arch/x86/unit/mn_div.py
@@ -0,0 +1,17 @@
+import sys
+from asm_test import Asm_Test_64
+
+class Test_DIV(Asm_Test_64):
+    TXT = '''
+main:
+        MOV RAX, 0x8877665544332211
+        MOV RBX, 0x11223344556677
+        DIV RBX
+        RET
+    '''
+    def check(self):
+        assert self.myjit.cpu.RAX == 0x7F7
+        assert self.myjit.cpu.RDX == 0x440
+
+if __name__ == "__main__":
+    [test(*sys.argv[1:])() for test in [Test_DIV]]