Add a regression test for DIV 128bits

2 files changed, 27 insertions, 0 deletions

diff --git a/test/arch/x86/unit/asm_test.py b/test/arch/x86/unit/asm_test.py
index aba47df1..8a6b215c 100644
--- a/test/arch/x86/unit/asm_test.py
+++ b/test/arch/x86/unit/asm_test.py
@@ -90,3 +90,13 @@ class Asm_Test_16(Asm_Test):
         self.myjit.vm.add_memory_page(self.run_addr, PAGE_READ | PAGE_WRITE, self.assembly)
         self.myjit.push_uint16_t(self.ret_addr)
         self.myjit.add_breakpoint(self.ret_addr, lambda x:False)
+
+class Asm_Test_64(Asm_Test):
+    arch_name = "x86_64"
+    arch_attrib = 64
+    ret_addr = 0x1337beef
+
+    def init_machine(self):
+        self.myjit.vm.add_memory_page(self.run_addr, PAGE_READ | PAGE_WRITE, self.assembly)
+        self.myjit.push_uint64_t(self.ret_addr)
+        self.myjit.add_breakpoint(self.ret_addr, lambda x:False)
diff --git a/test/arch/x86/unit/mn_div.py b/test/arch/x86/unit/mn_div.py
new file mode 100644
index 00000000..84569607
--- /dev/null
+++ b/test/arch/x86/unit/mn_div.py
@@ -0,0 +1,17 @@
+import sys
+from asm_test import Asm_Test_64
+
+class Test_DIV(Asm_Test_64):
+    TXT = '''
+main:
+        MOV RAX, 0x8877665544332211
+        MOV RBX, 0x11223344556677
+        DIV RBX
+        RET
+    '''
+    def check(self):
+        assert self.myjit.cpu.RAX == 0x7F7
+        assert self.myjit.cpu.RDX == 0x440
+
+if __name__ == "__main__":
+    [test(*sys.argv[1:])() for test in [Test_DIV]]