3 files changed, 41 insertions, 0 deletions
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py
index 6725f5bc..55dc653b 100644
--- a/miasm2/arch/x86/arch.py
+++ b/miasm2/arch/x86/arch.py
@@ -3645,6 +3645,8 @@ addop("lgdt", [bs8(0x0f), bs8(0x01)] + rmmod(d2, modrm=mod_mem))
 addop("lidt", [bs8(0x0f), bs8(0x01)] + rmmod(d3, modrm=mod_mem))
 
 addop("lfence", [bs8(0x0f), bs8(0xae), bs8(0xe8)])
+addop("mfence", [bs8(0x0f), bs8(0xae), bs8(0xf0)])
+addop("sfence", [bs8(0x0f), bs8(0xae), bs8(0xf8)])
 
 addop("leave", [bs8(0xc9), stk])
 
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py
index 81da8107..cb70b890 100644
--- a/miasm2/arch/x86/sem.py
+++ b/miasm2/arch/x86/sem.py
@@ -2626,6 +2626,24 @@ def nop(_, instr, a=None):
     return [], []
 
 
+def prefetch0(_, instr, src=None):
+    # see 4-198 on this documentation
+    # https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
+    return [], []
+
+
+def prefetch1(_, instr, src=None):
+    # see 4-198 on this documentation
+    # https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
+    return [], []
+
+
+def prefetch2(_, instr, src=None):
+    # see 4-198 on this documentation
+    # https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
+    return [], []
+
+
 def prefetchw(_, instr, src=None):
     # see 4-201 on this documentation
     # https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
@@ -2638,6 +2656,18 @@ def lfence(_, instr, src=None):
     return [], []
 
 
+def mfence(_, instr, src=None):
+    # see 3-516 on this documentation
+    # https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
+    return [], []
+
+
+def sfence(_, instr, src=None):
+    # see 3-356 on this documentation
+    # https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
+    return [], []
+
+
 def ud2(_, instr, src=None):
     e = [m2_expr.ExprAff(exception_flags, m2_expr.ExprInt(
         EXCEPT_ILLEGAL_INSN, exception_flags.size))]
@@ -4263,8 +4293,13 @@ mnemo_func = {'mov': mov,
               'fcomip': fcomip,
               'nop': nop,
               'ud2': ud2,
+              'prefetch0': prefetch0,
+              'prefetch1': prefetch1,
+              'prefetch2': prefetch2,
               'prefetchw': prefetchw,
               'lfence': lfence,
+              'mfence': mfence,
+              'sfence': sfence,
               'fnop': nop,  # XXX
               'hlt': hlt,
               'rdtsc': rdtsc,
diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py
index 694e18c0..972a2e12 100644
--- a/test/arch/x86/arch.py
+++ b/test/arch/x86/arch.py
@@ -2147,6 +2147,10 @@ reg_tests = [
 
     (m64, "00000000    LFENCE",
      "0faee8"),
+    (m64, "00000000    MFENCE",
+     "0FAEF0"),
+    (m64, "00000000    SFENCE",
+     "0FAEF8"),
 
 
     (m32, "00000000    SUB        AL, 0x11",