diff options
| -rw-r--r-- | miasm2/arch/mips32/ira.py | 5 | ||||
| -rw-r--r-- | miasm2/arch/mips32/regs.py | 6 | ||||
| -rw-r--r-- | miasm2/arch/mips32/sem.py | 36 | ||||
| -rw-r--r-- | miasm2/jitter/arch/JitCore_mips32.c | 6 | ||||
| -rw-r--r-- | miasm2/jitter/arch/JitCore_mips32.h | 2 |
5 files changed, 49 insertions, 6 deletions
diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py index bf0ed413..82af9acc 100644 --- a/miasm2/arch/mips32/ira.py +++ b/miasm2/arch/mips32/ira.py @@ -19,10 +19,7 @@ class ir_a_mips32(ir_mips32, ira): # for test XXX TODO def set_dead_regs(self, b): - b.rw[-1][1].add(self.arch.regs.zf) - b.rw[-1][1].add(self.arch.regs.nf) - b.rw[-1][1].add(self.arch.regs.of) - b.rw[-1][1].add(self.arch.regs.cf) + pass def call_effects(self, ad): irs = [[ExprAff(self.ret_reg, ExprOp('call_func_ret', ad, self.sp)), diff --git a/miasm2/arch/mips32/regs.py b/miasm2/arch/mips32/regs.py index 4999ea51..ef5e380c 100644 --- a/miasm2/arch/mips32/regs.py +++ b/miasm2/arch/mips32/regs.py @@ -5,11 +5,13 @@ from miasm2.expression.expression import * from miasm2.core.cpu import gen_reg, gen_regs gen_reg('PC', globals()) +gen_reg('PC_FETCH', globals()) gen_reg('R_LO', globals()) gen_reg('R_HI', globals()) PC_init = ExprId("PC_init") +PC_FETCH_init = ExprId("PC_FETCH_init") regs32_str = ["ZERO", 'AT', 'V0', 'V1'] +\ ['A%d'%i for i in xrange(4)] +\ @@ -50,9 +52,9 @@ regs_flt_expr, regs_flt_init, fltregs = gen_regs(regs_flt_str, globals(), sz=64) regs_fcc_expr, regs_fcc_init, fccregs = gen_regs(regs_fcc_str, globals()) -all_regs_ids = [PC, R_LO, R_HI] + gpregs_expr + regs_flt_expr + regs_fcc_expr +all_regs_ids = [PC, PC_FETCH, R_LO, R_HI] + gpregs_expr + regs_flt_expr + regs_fcc_expr all_regs_ids_byname = dict([(x.name, x) for x in all_regs_ids]) -all_regs_ids_init = [PC_init, R_LO_init, R_HI_init] + gpregs_init + regs_flt_init + regs_fcc_init +all_regs_ids_init = [PC_init, PC_FETCH_init, R_LO_init, R_HI_init] + gpregs_init + regs_flt_init + regs_fcc_init all_regs_ids_no_alias = all_regs_ids[:] regs_init = {} diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py index 41f38b3d..10986a99 100644 --- a/miasm2/arch/mips32/sem.py +++ b/miasm2/arch/mips32/sem.py @@ -490,3 +490,39 @@ class ir_mips32(ir): def get_next_break_label(self, instr): l = self.symbol_pool.getby_offset_create(instr.offset + 8) return l + + def add_bloc(self, bloc, gen_pc_updt = False): + c = None + ir_blocs_all = [] + for l in bloc.lines: + if c is None: + # print 'new c' + label = self.get_label(l) + c = irbloc(label) + ir_blocs_all.append(c) + bloc_dst = None + # print 'Translate', l + dst, ir_bloc_cur, ir_blocs_extra = self.instr2ir(l) + # print ir_bloc_cur + # for xxx in ir_bloc_cur: + # print "\t", xxx + assert((dst is None) or (bloc_dst is None)) + bloc_dst = dst + #if bloc_dst is not None: + # c.dst = bloc_dst + if dst is not None: + ir_bloc_cur.append(ExprAff(PC_FETCH, dst)) + c.dst = PC_FETCH + if gen_pc_updt is not False: + self.gen_pc_update(c, l) + + c.irs.append(ir_bloc_cur) + c.lines.append(l) + if ir_blocs_extra: + # print 'split' + for b in ir_blocs_extra: + b.lines = [l] * len(b.irs) + ir_blocs_all += ir_blocs_extra + c = None + self.post_add_bloc(bloc, ir_blocs_all) + return ir_blocs_all diff --git a/miasm2/jitter/arch/JitCore_mips32.c b/miasm2/jitter/arch/JitCore_mips32.c index 989bedd9..ebb1907a 100644 --- a/miasm2/jitter/arch/JitCore_mips32.c +++ b/miasm2/jitter/arch/JitCore_mips32.c @@ -59,6 +59,7 @@ reg_dict gpreg_dict[] = { {.name = "ZERO", .offset = offsetof(vm_cpu_t, ZERO)}, {.name = "FP", .offset = offsetof(vm_cpu_t, FP)}, {.name = "RA", .offset = offsetof(vm_cpu_t, RA)}, {.name = "PC", .offset = offsetof(vm_cpu_t, PC)}, + {.name = "PC_FETCH", .offset = offsetof(vm_cpu_t, PC_FETCH)}, {.name = "R_LO", .offset = offsetof(vm_cpu_t, R_LO)}, {.name = "R_HI", .offset = offsetof(vm_cpu_t, R_HI)}, }; @@ -119,6 +120,7 @@ PyObject* cpu_get_gpreg(JitCpu* self) get_reg(FP); get_reg(RA); get_reg(PC); + get_reg(PC_FETCH); get_reg(R_LO); get_reg(R_HI); @@ -323,6 +325,7 @@ getset_reg_u32(SP); getset_reg_u32(FP); getset_reg_u32(RA); getset_reg_u32(PC); +getset_reg_u32(PC_FETCH); getset_reg_u32(R_LO); getset_reg_u32(R_HI); @@ -376,6 +379,7 @@ PyObject* get_gpreg_offset_all(void) get_reg_off(FP); get_reg_off(RA); get_reg_off(PC); + get_reg_off(PC_FETCH); get_reg_off(R_LO); get_reg_off(R_HI); @@ -412,6 +416,7 @@ PyObject* get_gpreg_offset_all(void) get_reg_off(FP_new); get_reg_off(RA_new); get_reg_off(PC_new); + get_reg_off(PC_FETCH_new); get_reg_off(R_LO_new); get_reg_off(R_HI_new); @@ -547,6 +552,7 @@ static PyGetSetDef JitCpu_getseters[] = { {"FP" , (getter)JitCpu_get_FP , (setter)JitCpu_set_FP , "FP" , NULL}, {"RA" , (getter)JitCpu_get_RA , (setter)JitCpu_set_RA , "RA" , NULL}, {"PC" , (getter)JitCpu_get_PC , (setter)JitCpu_set_PC , "PC" , NULL}, + {"PC_FETCH" , (getter)JitCpu_get_PC_FETCH , (setter)JitCpu_set_PC_FETCH , "PC_FETCH" , NULL}, {"R_LO" , (getter)JitCpu_get_R_LO , (setter)JitCpu_set_R_LO , "R_LO" , NULL}, {"R_HI" , (getter)JitCpu_get_R_HI , (setter)JitCpu_set_R_HI , "R_HI" , NULL}, diff --git a/miasm2/jitter/arch/JitCore_mips32.h b/miasm2/jitter/arch/JitCore_mips32.h index 9a001989..65666d88 100644 --- a/miasm2/jitter/arch/JitCore_mips32.h +++ b/miasm2/jitter/arch/JitCore_mips32.h @@ -38,6 +38,7 @@ typedef struct { uint32_t FP; uint32_t RA; uint32_t PC; + uint32_t PC_FETCH; uint32_t R_LO; uint32_t R_HI; @@ -74,6 +75,7 @@ typedef struct { uint32_t FP_new; uint32_t RA_new; uint32_t PC_new; + uint32_t PC_FETCH_new; uint32_t R_LO_new; uint32_t R_HI_new; |