diff options
| -rw-r--r-- | miasm/analysis/machine.py | 6 | ||||
| -rw-r--r-- | miasm/arch/x86/ira.py | 14 | ||||
| -rw-r--r-- | miasm/arch/x86/jit.py | 8 | ||||
| -rw-r--r-- | miasm/arch/x86/sem.py | 6 | ||||
| -rw-r--r-- | miasm/ir/analysis.py | 2 | ||||
| -rw-r--r-- | miasm/ir/symbexec.py | 2 | ||||
| -rw-r--r-- | test/arch/x86/arch.py | 2 | ||||
| -rwxr-xr-x | test/arch/x86/sem.py | 2 | ||||
| -rwxr-xr-x | test/ir/symbexec.py | 6 |
9 files changed, 24 insertions, 24 deletions
diff --git a/miasm/analysis/machine.py b/miasm/analysis/machine.py index f9b26106..ba6a1fd3 100644 --- a/miasm/analysis/machine.py +++ b/miasm/analysis/machine.py @@ -103,7 +103,7 @@ class Machine(object): pass mn = arch.mn_x86 from miasm.arch.x86.lifter_model_call import ir_a_x86_16 as lifter_model_call - from miasm.arch.x86.sem import ir_x86_16 as ir + from miasm.arch.x86.sem import Lifter_X86_16 as ir elif machine_name == "x86_32": from miasm.arch.x86.disasm import dis_x86_32 as dis_engine from miasm.arch.x86 import arch @@ -114,7 +114,7 @@ class Machine(object): pass mn = arch.mn_x86 from miasm.arch.x86.lifter_model_call import ir_a_x86_32 as lifter_model_call - from miasm.arch.x86.sem import ir_x86_32 as ir + from miasm.arch.x86.sem import Lifter_X86_32 as ir try: from miasm.analysis.gdbserver import GdbServer_x86_32 as gdbserver except ImportError: @@ -129,7 +129,7 @@ class Machine(object): pass mn = arch.mn_x86 from miasm.arch.x86.lifter_model_call import ir_a_x86_64 as lifter_model_call - from miasm.arch.x86.sem import ir_x86_64 as ir + from miasm.arch.x86.sem import Lifter_X86_64 as ir elif machine_name == "msp430": from miasm.arch.msp430.disasm import dis_msp430 as dis_engine from miasm.arch.msp430 import arch diff --git a/miasm/arch/x86/ira.py b/miasm/arch/x86/ira.py index 5022ed6e..ebcc9e2f 100644 --- a/miasm/arch/x86/ira.py +++ b/miasm/arch/x86/ira.py @@ -3,22 +3,22 @@ from miasm.expression.expression import ExprAssign, ExprOp from miasm.ir.ir import AssignBlock from miasm.ir.analysis import LifterModelCall -from miasm.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 +from miasm.arch.x86.sem import Lifter_X86_16, Lifter_X86_32, Lifter_X86_64 -class ir_a_x86_16(ir_x86_16, LifterModelCall): +class ir_a_x86_16(Lifter_X86_16, LifterModelCall): def __init__(self, loc_db): - ir_x86_16.__init__(self, loc_db) + Lifter_X86_16.__init__(self, loc_db) self.ret_reg = self.arch.regs.AX def get_out_regs(self, _): return set([self.ret_reg, self.sp]) -class ir_a_x86_32(ir_x86_32, ir_a_x86_16): +class ir_a_x86_32(Lifter_X86_32, ir_a_x86_16): def __init__(self, loc_db): - ir_x86_32.__init__(self, loc_db) + Lifter_X86_32.__init__(self, loc_db) self.ret_reg = self.arch.regs.EAX def sizeof_char(self): @@ -37,10 +37,10 @@ class ir_a_x86_32(ir_x86_32, ir_a_x86_16): return 32 -class ir_a_x86_64(ir_x86_64, ir_a_x86_16): +class ir_a_x86_64(Lifter_X86_64, ir_a_x86_16): def __init__(self, loc_db): - ir_x86_64.__init__(self, loc_db) + Lifter_X86_64.__init__(self, loc_db) self.ret_reg = self.arch.regs.RAX def call_effects(self, ad, instr): diff --git a/miasm/arch/x86/jit.py b/miasm/arch/x86/jit.py index 9113b9ad..38301e3c 100644 --- a/miasm/arch/x86/jit.py +++ b/miasm/arch/x86/jit.py @@ -2,7 +2,7 @@ from builtins import range import logging from miasm.jitter.jitload import Jitter, named_arguments -from miasm.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 +from miasm.arch.x86.sem import Lifter_X86_16, Lifter_X86_32, Lifter_X86_64 from miasm.jitter.codegen import CGen from miasm.ir.translators.C import TranslatorC @@ -42,7 +42,7 @@ class jitter_x86_16(Jitter): C_Gen = x86_32_CGen def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_x86_16(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_X86_16(loc_db), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False self.orig_irbloc_fix_regs_for_mode = self.ir_arch.irbloc_fix_regs_for_mode @@ -73,7 +73,7 @@ class jitter_x86_32(Jitter): C_Gen = x86_32_CGen def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_x86_32(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_X86_32(loc_db), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False @@ -199,7 +199,7 @@ class jitter_x86_64(Jitter): args_regs_stdcall = ['RCX', 'RDX', 'R8', 'R9'] def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_x86_64(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_X86_64(loc_db), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False diff --git a/miasm/arch/x86/sem.py b/miasm/arch/x86/sem.py index b41d5543..5b6ff917 100644 --- a/miasm/arch/x86/sem.py +++ b/miasm/arch/x86/sem.py @@ -5748,7 +5748,7 @@ mnemo_func = {'mov': mov, } -class ir_x86_16(Lifter): +class Lifter_X86_16(Lifter): def __init__(self, loc_db): Lifter.__init__(self, mn_x86, 16, loc_db) @@ -5891,7 +5891,7 @@ class ir_x86_16(Lifter): return IRBlock(self.loc_db, irblock.loc_key, irs) -class ir_x86_32(ir_x86_16): +class Lifter_X86_32(Lifter_X86_16): def __init__(self, loc_db): Lifter.__init__(self, mn_x86, 32, loc_db) @@ -5905,7 +5905,7 @@ class ir_x86_32(ir_x86_16): self.addrsize = 32 -class ir_x86_64(ir_x86_16): +class Lifter_X86_64(Lifter_X86_16): def __init__(self, loc_db): Lifter.__init__(self, mn_x86, 64, loc_db) diff --git a/miasm/ir/analysis.py b/miasm/ir/analysis.py index aee7fab7..13e4d238 100644 --- a/miasm/ir/analysis.py +++ b/miasm/ir/analysis.py @@ -23,7 +23,7 @@ class LifterModelCall(Lifter): `miasm.ir.ir::Lifter` class. For instance: - class LifterModelCall_x86_16(ir_x86_16, LifterModelCall) + class LifterModelCall_x86_16(Lifter_X86_16, LifterModelCall) """ ret_reg = None diff --git a/miasm/ir/symbexec.py b/miasm/ir/symbexec.py index 8c6245b8..ee8e4924 100644 --- a/miasm/ir/symbexec.py +++ b/miasm/ir/symbexec.py @@ -764,7 +764,7 @@ class SymbolicExecutionEngine(object): from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.ir.ir import AssignBlock - ir_arch = ir_x86_32() + ir_arch = Lifter_X86_32() init_state = { ir_arch.arch.regs.EAX: ir_arch.arch.regs.EBX, diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py index 0455462d..bedbc503 100644 --- a/test/arch/x86/arch.py +++ b/test/arch/x86/arch.py @@ -6,7 +6,7 @@ from miasm.core.utils import decode_hex, encode_hex import miasm.expression.expression as m2_expr from miasm.arch.x86.arch import mn_x86, deref_mem_ad, \ base_expr, rmarg, print_size -from miasm.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 +from miasm.arch.x86.sem import Lifter_X86_16, Lifter_X86_32, Lifter_X86_64 from miasm.core.bin_stream import bin_stream_str from miasm.core.locationdb import LocationDB diff --git a/test/arch/x86/sem.py b/test/arch/x86/sem.py index 9c7e972b..ecee5772 100755 --- a/test/arch/x86/sem.py +++ b/test/arch/x86/sem.py @@ -14,7 +14,7 @@ import copy from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.arch.x86.arch import mn_x86 as mn -from miasm.arch.x86.sem import ir_x86_32 as ir_32, ir_x86_64 as ir_64 +from miasm.arch.x86.sem import Lifter_X86_32 as ir_32, Lifter_X86_64 as ir_64 from miasm.arch.x86.regs import * from miasm.expression.expression import * from miasm.expression.simplifications import expr_simp diff --git a/test/ir/symbexec.py b/test/ir/symbexec.py index 5b4d19b2..0ab7e5a7 100755 --- a/test/ir/symbexec.py +++ b/test/ir/symbexec.py @@ -13,14 +13,14 @@ class TestSymbExec(unittest.TestCase): def test_ClassDef(self): from miasm.expression.expression import ExprInt, ExprId, ExprMem, \ ExprCompose, ExprAssign - from miasm.arch.x86.sem import ir_x86_32 + from miasm.arch.x86.sem import Lifter_X86_32 from miasm.core.locationdb import LocationDB from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.ir.ir import AssignBlock loc_db = LocationDB() - lifter_model_call = ir_x86_32(loc_db) + lifter_model_call = Lifter_X86_32(loc_db) ircfg = lifter_model_call.new_ircfg() id_x = ExprId('x', 32) @@ -235,7 +235,7 @@ class TestSymbExec(unittest.TestCase): # Test memory full print('full') - arch_addr8 = ir_x86_32(loc_db) + arch_addr8 = Lifter_X86_32(loc_db) ircfg = arch_addr8.new_ircfg() # Hack to obtain tiny address space arch_addr8.addrsize = 5 |