diff options
| -rw-r--r-- | example/expression/access_c.py | 4 | ||||
| -rw-r--r-- | example/symbol_exec/depgraph.py | 4 | ||||
| -rw-r--r-- | miasm2/analysis/data_flow.py | 2 | ||||
| -rw-r--r-- | miasm2/arch/aarch64/sem.py | 2 | ||||
| -rw-r--r-- | miasm2/arch/mips32/ira.py | 10 | ||||
| -rw-r--r-- | miasm2/arch/mips32/jit.py | 2 | ||||
| -rw-r--r-- | miasm2/arch/x86/ira.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/x86/sem.py | 2 | ||||
| -rw-r--r-- | miasm2/ir/analysis.py | 14 | ||||
| -rw-r--r-- | miasm2/ir/ir.py | 52 | ||||
| -rw-r--r-- | miasm2/jitter/codegen.py | 2 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore_python.py | 18 | ||||
| -rw-r--r-- | test/analysis/data_flow.py | 3 | ||||
| -rw-r--r-- | test/analysis/depgraph.py | 5 |
14 files changed, 61 insertions, 63 deletions
diff --git a/example/expression/access_c.py b/example/expression/access_c.py index eabc3770..923a3331 100644 --- a/example/expression/access_c.py +++ b/example/expression/access_c.py @@ -109,8 +109,8 @@ def get_funcs_arg0(ctx, ira, lbl_head): element = ira.arch.regs.RSI for irb, index in find_call(ira): - line = irb.lines[index] - print 'Analysing references from:', hex(line.offset), line + instr = irb.irs[index].instr + print 'Analysing references from:', hex(instr.offset), instr g_list = g_dep.get(irb.label, set([element]), index, set([lbl_head])) for dep in g_list: emul_result = dep.emul(ctx) diff --git a/example/symbol_exec/depgraph.py b/example/symbol_exec/depgraph.py index 0b971b15..56ca3f82 100644 --- a/example/symbol_exec/depgraph.py +++ b/example/symbol_exec/depgraph.py @@ -75,8 +75,8 @@ dg = DependencyGraph(ir_arch, implicit=args.implicit, target_addr = int(args.target_addr, 0) current_block = list(ir_arch.getby_offset(target_addr))[0] line_nb = 0 -for line_nb, line in enumerate(current_block.lines): - if line.offset == target_addr: +for line_nb, assignblk in enumerate(current_block.irs): + if assignblk.instr.offset == target_addr: break # Enumerate solutions diff --git a/miasm2/analysis/data_flow.py b/miasm2/analysis/data_flow.py index 3c77fc40..dc1bf6ae 100644 --- a/miasm2/analysis/data_flow.py +++ b/miasm2/analysis/data_flow.py @@ -252,4 +252,4 @@ def dead_simp(ir_a): for lval in assignblk: if InstrNode(block.label, idx, lval) not in useful: del new_assignblk[lval] - block.irs[idx] = AssignBlock(new_assignblk) + block.irs[idx] = AssignBlock(new_assignblk, assignblk.instr) diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py index edc6e3a5..599cdc98 100644 --- a/miasm2/arch/aarch64/sem.py +++ b/miasm2/arch/aarch64/sem.py @@ -793,7 +793,7 @@ class ir_aarch64l(IntermediateRepresentation): dst = self.expr_fix_regs_for_mode(dst) src = self.expr_fix_regs_for_mode(src) new_assignblk[dst] = src - irbloc.irs[idx] = AssignBlock(new_assignblk) + irbloc.irs[idx] = AssignBlock(new_assignblk, assignblk.instr) if irbloc.dst is not None: irbloc.dst = self.expr_fix_regs_for_mode(irbloc.dst) diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py index 92af5cc5..a2eab4fb 100644 --- a/miasm2/arch/mips32/ira.py +++ b/miasm2/arch/mips32/ira.py @@ -31,18 +31,18 @@ class ir_a_mips32l(ir_mips32l, ira): if expr_is_label(lr_val): lr_val = ExprInt(lr_val.name.offset, 32) - line = block.lines[-2] - if lr_val.arg != line.offset + 8: + instr = block.irs[-2].instr + if lr_val.arg != instr.offset + 8: raise ValueError("Wrong arg") # CALL lbl = block.get_next() new_lbl = self.gen_label() - irs = self.call_effects(pc_val, line) + irs = self.call_effects(pc_val, instr) irs.append(AssignBlock([ExprAff(self.IRDst, - ExprId(lbl, size=self.pc.size))])) + ExprId(lbl, size=self.pc.size))], + instr)) nblock = IRBlock(new_lbl, irs) - nblock.lines = [line] * len(irs) self.blocks[new_lbl] = nblock irb.dst = ExprId(new_lbl, size=self.pc.size) diff --git a/miasm2/arch/mips32/jit.py b/miasm2/arch/mips32/jit.py index 939a0e50..9b46589f 100644 --- a/miasm2/arch/mips32/jit.py +++ b/miasm2/arch/mips32/jit.py @@ -57,7 +57,7 @@ class mipsCGen(CGen): self.ir_arch.get_next_instr(instr)) irblock.dst = m2_expr.ExprId( self.ir_arch.get_next_instr(instr)) - irblock.irs[idx] = AssignBlock(new_assignblock) + irblock.irs[idx] = AssignBlock(new_assignblock, assignblock.instr) return irblocks_list diff --git a/miasm2/arch/x86/ira.py b/miasm2/arch/x86/ira.py index 1fcaaa52..d0bebfb6 100644 --- a/miasm2/arch/x86/ira.py +++ b/miasm2/arch/x86/ira.py @@ -53,7 +53,9 @@ class ir_a_x86_64(ir_x86_64, ir_a_x86_16): )), ExprAff(self.sp, ExprOp('call_func_stack', ad, self.sp)), - ])] + ], + instr + )] def sizeof_char(self): return 8 diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index b0cdc280..0312891b 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -4617,7 +4617,7 @@ class ir_x86_16(IntermediateRepresentation): dst = self.expr_fix_regs_for_mode(dst, mode) src = self.expr_fix_regs_for_mode(src, mode) new_assignblk[dst] = src - irbloc.irs[idx] = AssignBlock(new_assignblk) + irbloc.irs[idx] = AssignBlock(new_assignblk, assignblk.instr) if irbloc.dst is not None: irbloc.dst = self.expr_fix_regs_for_mode(irbloc.dst, mode) diff --git a/miasm2/ir/analysis.py b/miasm2/ir/analysis.py index 5c5193c9..1d9310fc 100644 --- a/miasm2/ir/analysis.py +++ b/miasm2/ir/analysis.py @@ -39,11 +39,11 @@ class ira(IntermediateRepresentation): @instr: native instruction which is responsible of the call """ - return [AssignBlock( - [ExprAff(self.ret_reg, ExprOp('call_func_ret', ad, self.sp)), - ExprAff(self.sp, ExprOp( - 'call_func_stack', ad, self.sp)), - ])] + assignblk = AssignBlock({ + self.ret_reg: ExprOp('call_func_ret', ad, self.sp), + self.sp: ExprOp('call_func_stack', ad, self.sp)}, + instr) + return [assignblk] def pre_add_instr(self, block, instr, irb_cur, ir_blocks_all, gen_pc_update): """Replace function call with corresponding call effects, @@ -53,7 +53,6 @@ class ira(IntermediateRepresentation): call_effects = self.call_effects(instr.args[0], instr) for assignblk in call_effects: irb_cur.irs.append(assignblk) - irb_cur.lines.append(instr) return None def gen_equations(self): @@ -70,8 +69,7 @@ class ira(IntermediateRepresentation): eqs.append(ExprAff(n_w, v)) print '*' * 40 print irb - irb.irs = [eqs] - irb.lines = [None] + irb.irs = [AssignBlock(eqs)] def sizeof_char(self): "Return the size of a char in bits" diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py index 2f718e25..0995b86a 100644 --- a/miasm2/ir/ir.py +++ b/miasm2/ir/ir.py @@ -30,12 +30,13 @@ from miasm2.core.graph import DiGraph class AssignBlock(object): - __slots__ = ["_assigns"] + __slots__ = ["_assigns", "_instr"] - def __init__(self, irs=None): + def __init__(self, irs=None, instr=None): """@irs seq""" if irs is None: irs = [] + self._instr = instr self._assigns = {} # ExprAff.dst -> ExprAff.src # Concurrent assignments are handled in _set @@ -46,6 +47,10 @@ class AssignBlock(object): for expraff in irs: self._set(expraff.dst, expraff.src) + @property + def instr(self): + return self._instr + def _set(self, dst, src): """ Special cases: @@ -201,7 +206,7 @@ class AssignBlock(object): def __str__(self): out = [] - for dst, src in sorted(self.iteritems()): + for dst, src in sorted(self._assigns.iteritems()): out.append("%s = %s" % (dst, src)) return "\n".join(out) @@ -217,19 +222,15 @@ class IRBlock(object): Stand for an intermediate representation basic block. """ - def __init__(self, label, irs, lines=None): + def __init__(self, label, irs): """ @label: AsmLabel of the IR basic block @irs: list of AssignBlock - @lines: list of native instructions """ assert isinstance(label, AsmLabel) - if lines is None: - lines = [] self.label = label self.irs = irs - self.lines = lines self.except_automod = True self._dst = None self._dst_linenb = None @@ -263,7 +264,8 @@ class IRBlock(object): # Sanity check is already done in _get_dst break self._dst = value - self.irs[self._dst_linenb] = AssignBlock(new_assignblk) + instr = self.irs[self._dst_linenb].instr + self.irs[self._dst_linenb] = AssignBlock(new_assignblk, instr) dst = property(_get_dst, _set_dst) @property @@ -310,7 +312,7 @@ class irbloc(IRBlock): def __init__(self, label, irs, lines=None): warnings.warn('DEPRECATION WARNING: use "IRBlock" instead of "irblock"') - super(irbloc, self).__init__(label, irs, lines) + super(irbloc, self).__init__(label, irs) class DiGraphIR(DiGraph): @@ -399,9 +401,12 @@ class IntermediateRepresentation(object): def instr2ir(self, instr): ir_bloc_cur, extra_assignblk = self.get_ir(instr) - assignblk = AssignBlock(ir_bloc_cur) for irb in extra_assignblk: - irb.irs = map(AssignBlock, irb.irs) + irs = [] + for assignblk in irb.irs: + irs.append(AssignBlock(assignblk, instr)) + irb.irs = irs + assignblk = AssignBlock(ir_bloc_cur, instr) return assignblk, extra_assignblk def get_label(self, addr): @@ -434,17 +439,15 @@ class IntermediateRepresentation(object): def getby_offset(self, offset): out = set() for irb in self.blocks.values(): - for line in irb.lines: - if line.offset <= offset < line.offset + line.l: + for assignblk in irb.irs: + instr = assignblk.instr + if instr.offset <= offset < instr.offset + instr.l: out.add(irb) return out - def gen_pc_update(self, irblock, line): - irblock.irs.append(AssignBlock([m2_expr.ExprAff(self.pc, - m2_expr.ExprInt(line.offset, - self.pc.size) - )])) - irblock.lines.append(line) + def gen_pc_update(self, irblock, instr): + irblock.irs.append(AssignBlock({self.pc: m2_expr.ExprInt(instr.offset, self.pc.size)}, + instr)) def pre_add_instr(self, block, instr, irb_cur, ir_blocks_all, gen_pc_updt): """Function called before adding an instruction from the the native @block to @@ -487,11 +490,8 @@ class IntermediateRepresentation(object): self.gen_pc_update(irb_cur, instr) irb_cur.irs.append(assignblk) - irb_cur.lines.append(instr) if ir_blocks_extra: - for irblock in ir_blocks_extra: - irblock.lines = [instr] * len(irblock.irs) ir_blocks_all += ir_blocks_extra irb_cur = None return irb_cur @@ -508,7 +508,7 @@ class IntermediateRepresentation(object): for instr in block.lines: if irb_cur is None: label = self.get_instr_label(instr) - irb_cur = IRBlock(label, [], []) + irb_cur = IRBlock(label, []) ir_blocks_all.append(irb_cur) irb_cur = self.add_instr_to_irblock(block, instr, irb_cur, ir_blocks_all, gen_pc_updt) @@ -543,8 +543,8 @@ class IntermediateRepresentation(object): else: dst = m2_expr.ExprId(next_lbl, self.pc.size) - irblock.irs.append(AssignBlock([m2_expr.ExprAff(self.IRDst, dst)])) - irblock.lines.append(irblock.lines[-1]) + irblock.irs.append(AssignBlock({self.IRDst: dst}, + irblock.irs[-1].instr)) def post_add_bloc(self, block, ir_blocks): self.set_empty_dst_to_next(block, ir_blocks) diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py index 8a03c667..e91f3505 100644 --- a/miasm2/jitter/codegen.py +++ b/miasm2/jitter/codegen.py @@ -143,7 +143,7 @@ class CGen(object): offset = instr.offset + instr.l dst = m2_expr.ExprInt(offset, self.ir_arch.IRDst.size) new_assignblk[self.ir_arch.IRDst] = dst - irs = [AssignBlock(new_assignblk)] + irs = [AssignBlock(new_assignblk, instr)] return IRBlock(self.ir_arch.get_instr_label(instr), irs) def block2assignblks(self, block): diff --git a/miasm2/jitter/jitcore_python.py b/miasm2/jitter/jitcore_python.py index cbd582ab..6d954aae 100644 --- a/miasm2/jitter/jitcore_python.py +++ b/miasm2/jitter/jitcore_python.py @@ -72,18 +72,18 @@ class JitCore_Python(jitcore.JitCore): exec_engine.update_engine_from_cpu() # Execute current ir bloc - for ir, line in zip(irb.irs, irb.lines): - + for assignblk in irb.irs: + instr = assignblk.instr # For each new instruction (in assembly) - if line.offset not in offsets_jitted: + if instr.offset not in offsets_jitted: # Test exceptions vmmngr.check_invalid_code_blocs() vmmngr.check_memory_breakpoint() if vmmngr.get_exception(): exec_engine.update_cpu_from_engine() - return line.offset + return instr.offset - offsets_jitted.add(line.offset) + offsets_jitted.add(instr.offset) # Log registers values if self.log_regs: @@ -92,21 +92,21 @@ class JitCore_Python(jitcore.JitCore): # Log instruction if self.log_mn: - print "%08x %s" % (line.offset, line) + print "%08x %s" % (instr.offset, instr) # Check for exception if (vmmngr.get_exception() != 0 or cpu.get_exception() != 0): exec_engine.update_cpu_from_engine() - return line.offset + return instr.offset # Eval current instruction (in IR) - exec_engine.eval_ir(ir) + exec_engine.eval_ir(assignblk) # Check for exceptions which do not update PC exec_engine.update_cpu_from_engine() if (vmmngr.get_exception() & csts.EXCEPT_DO_NOT_UPDATE_PC != 0 or cpu.get_exception() > csts.EXCEPT_NUM_UPDT_EIP): - return line.offset + return instr.offset vmmngr.check_invalid_code_blocs() vmmngr.check_memory_breakpoint() diff --git a/test/analysis/data_flow.py b/test/analysis/data_flow.py index e9029e8e..2c24773a 100644 --- a/test/analysis/data_flow.py +++ b/test/analysis/data_flow.py @@ -37,7 +37,6 @@ dummy = ExprId('dummy', 32) def gen_irblock(label, exprs_list): - lines = [None for _ in xrange(len(exprs_list))] irs = [] for exprs in exprs_list: if isinstance(exprs, AssignBlock): @@ -46,7 +45,7 @@ def gen_irblock(label, exprs_list): irs.append(AssignBlock(exprs)) irs.append(AssignBlock({IRDst:dummy})) - irbl = IRBlock(label, irs, lines) + irbl = IRBlock(label, irs) return irbl diff --git a/test/analysis/depgraph.py b/test/analysis/depgraph.py index 005ab32c..63313861 100644 --- a/test/analysis/depgraph.py +++ b/test/analysis/depgraph.py @@ -50,10 +50,9 @@ LBL5 = AsmLabel("lbl5") LBL6 = AsmLabel("lbl6") def gen_irblock(label, exprs_list): - """ Returns an IRBlock with empty lines. + """ Returns an IRBlock. Used only for tests purpose """ - lines = [None for _ in xrange(len(exprs_list))] irs = [] for exprs in exprs_list: if isinstance(exprs, AssignBlock): @@ -61,7 +60,7 @@ def gen_irblock(label, exprs_list): else: irs.append(AssignBlock(exprs)) - irbl = IRBlock(label, irs, lines) + irbl = IRBlock(label, irs) return irbl |