diff options
| -rw-r--r-- | miasm2/arch/arm/arch.py | 13 | ||||
| -rw-r--r-- | test/arch/arm/arch.py | 5 |
2 files changed, 18 insertions, 0 deletions
diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py index 71c0ac47..73b198ba 100644 --- a/miasm2/arch/arm/arch.py +++ b/miasm2/arch/arm/arch.py @@ -1288,6 +1288,17 @@ offs_blx = bs(l=24, cls=(arm_offs_blx,), fname="offs") fix_cond = bs("1111", fname="cond") +class mul_part_x(bs_mod_name): + prio = 5 + mn_mod = ['B', 'T'] + +class mul_part_y(bs_mod_name): + prio = 6 + mn_mod = ['B', 'T'] + +mul_x = mul_part_x(l=1, fname='x', mn_mod=['B', 'T']) +mul_y = mul_part_y(l=1, fname='y', mn_mod=['B', 'T']) + class arm_immed(m_arg): parser = deref @@ -1454,6 +1465,8 @@ armop("data_mov", armop("data_test", [bs('00'), immop, bs_data_test_name, dumscc, rn, dumr, op2]) armop("b", [bs('101'), lnk, offs]) +armop("smul", [bs('00010110'), rd, bs('0000'), rs, bs('1'), mul_y, mul_x, bs('0'), rm], [rd, rm, rs]) + # TODO TEST #armop("und", [bs('011'), imm20, bs('1'), imm4]) armop("transfer", [bs('01'), immop, ppi, updown, trb, wback_no_t, diff --git a/test/arch/arm/arch.py b/test/arch/arm/arch.py index a66ba4cf..533b2052 100644 --- a/test/arch/arm/arch.py +++ b/test/arch/arm/arch.py @@ -196,6 +196,11 @@ reg_tests_arm = [ ("C03E6440 SMLAL R2, R0, R1, R0", "9120E0E0"), + ("00003904 SMULBB R0, R0, R1", + "800160E1"), + ("00003904 SMULBT R0, R0, R1", + "C00160E1"), + ("C00CFA40 BLX R12", "3CFF2FE1"), ("C010DE1C BLX 0x1ECCEA", |