diff options
| -rw-r--r-- | README.md | 2 | ||||
| -rw-r--r-- | miasm2/arch/x86/sem.py | 13 | ||||
| -rw-r--r-- | miasm2/jitter/codegen.py | 8 | ||||
| -rw-r--r-- | miasm2/jitter/op_semantics.c | 6 | ||||
| -rw-r--r-- | miasm2/jitter/op_semantics.h | 2 |
5 files changed, 12 insertions, 19 deletions
diff --git a/README.md b/README.md index 5c518efd..b75eeb44 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,6 @@ [](https://travis-ci.org/cea-sec/miasm) [](https://ci.appveyor.com/project/serpilliere/miasm-6lfba/branch/master) -[](https://codeclimate.com/github/cea-sec/miasm) +[](https://codeclimate.com/github/cea-sec/miasm) [](https://gitter.im/cea-sec/miasm?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge) Reverse engineering framework in Python diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index 63b68e39..939cd400 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -636,9 +636,7 @@ def _rotate_tpl(ir, instr, dst, src, op, left=False): m2_expr.ExprAssign(of, new_of), m2_expr.ExprAssign(dst, res) ] - e = [] - if dst.size == 32 and dst in replace_regs[64]: - e.append(m2_expr.ExprAssign(dst[:dst.size], dst)) + e = [m2_expr.ExprAssign(dst, dst)] # Don't generate conditional shifter on constant if isinstance(shifter, m2_expr.ExprInt): if int(shifter) != 0: @@ -686,9 +684,7 @@ def rotate_with_carry_tpl(ir, instr, op, dst, src): m2_expr.ExprAssign(of, new_of), m2_expr.ExprAssign(dst, new_dst) ] - e = [] - if dst.size == 32 and dst in replace_regs[64]: - e.append(m2_expr.ExprAssign(dst[:dst.size], dst)) + e = [m2_expr.ExprAssign(dst, dst)] # Don't generate conditional shifter on constant if isinstance(shifter, m2_expr.ExprInt): if int(shifter) != 0: @@ -774,9 +770,7 @@ def _shift_tpl(op, ir, instr, a, b, c=None, op_inv=None, left=False, m2_expr.ExprAssign(a, res), ] e_do += update_flag_znp(res) - e = [] - if a.size == 32 and a in replace_regs[64]: - e.append(m2_expr.ExprAssign(a[:a.size], a)) + e = [m2_expr.ExprAssign(a, a)] # Don't generate conditional shifter on constant if isinstance(shifter, m2_expr.ExprInt): if int(shifter) != 0: @@ -5652,7 +5646,6 @@ class ir_x86_16(IntermediateRepresentation): instr_ir, extra_ir = mnemo_func[ instr.name.lower()](self, instr, *args) - self.mod_pc(instr, instr_ir, extra_ir) instr.additional_info.except_on_instr = False if instr.additional_info.g1.value & 6 == 0 or \ diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py index 6c0e7a9b..e8177ab5 100644 --- a/miasm2/jitter/codegen.py +++ b/miasm2/jitter/codegen.py @@ -170,7 +170,8 @@ class CGen(object): # Simplify high level operators out = [] for irblock in irblocks: - new_irblock = irblock.simplify(expr_simp_high_to_explicit)[1] + new_irblock = self.ir_arch.irbloc_fix_regs_for_mode(irblock, self.ir_arch.attrib) + new_irblock = new_irblock.simplify(expr_simp_high_to_explicit)[1] out.append(new_irblock) irblocks = out @@ -631,13 +632,12 @@ class CGen(object): for instr, irblocks in zip(block.lines, irblocks_list): instr_attrib, irblocks_attributes = self.get_attributes(instr, irblocks, log_mn, log_regs) for index, irblock in enumerate(irblocks): - new_irblock = self.ir_arch.irbloc_fix_regs_for_mode(irblock, self.ir_arch.attrib) - label = str(new_irblock.loc_key) + label = str(irblock.loc_key) out.append("%-40s // %.16X %s" % (label + ":", instr.offset, instr)) if index == 0: out += self.gen_pre_code(instr_attrib) - out += self.gen_irblock(instr_attrib, irblocks_attributes[index], instr_offsets, new_irblock) + out += self.gen_irblock(instr_attrib, irblocks_attributes[index], instr_offsets, irblock) out += self.gen_finalize(block) diff --git a/miasm2/jitter/op_semantics.c b/miasm2/jitter/op_semantics.c index 33a07054..091da87f 100644 --- a/miasm2/jitter/op_semantics.c +++ b/miasm2/jitter/op_semantics.c @@ -253,15 +253,15 @@ uint64_t rot_right(uint64_t size, uint64_t a, uint64_t b) * - cntleadzeros(size=32, src=2): 30 * - cntleadzeros(size=32, src=0): 32 */ -unsigned int cntleadzeros(uint64_t size, uint64_t src) +uint64_t cntleadzeros(uint64_t size, uint64_t src) { int64_t i; for (i=(int64_t)size-1; i>=0; i--){ if (src & (1ull << i)) - return (unsigned int)(size - (i + 1)); + return (uint64_t)(size - (i + 1)); } - return (unsigned int)size; + return (uint64_t)size; } /* diff --git a/miasm2/jitter/op_semantics.h b/miasm2/jitter/op_semantics.h index f797e52b..921c9b9e 100644 --- a/miasm2/jitter/op_semantics.h +++ b/miasm2/jitter/op_semantics.h @@ -37,7 +37,7 @@ _MIASM_EXPORT unsigned int umul16_hi(unsigned short a, unsigned short b); _MIASM_EXPORT uint64_t rot_left(uint64_t size, uint64_t a, uint64_t b); _MIASM_EXPORT uint64_t rot_right(uint64_t size, uint64_t a, uint64_t b); -_MIASM_EXPORT unsigned int cntleadzeros(uint64_t size, uint64_t src); +_MIASM_EXPORT uint64_t cntleadzeros(uint64_t size, uint64_t src); _MIASM_EXPORT unsigned int cnttrailzeros(uint64_t size, uint64_t src); #define UDIV(sizeA) \ |