diff options
| -rw-r--r-- | miasm2/analysis/dse.py | 18 | ||||
| -rw-r--r-- | miasm2/arch/aarch64/sem.py | 5 | ||||
| -rw-r--r-- | miasm2/arch/arm/jit.py | 8 | ||||
| -rw-r--r-- | miasm2/arch/x86/jit.py | 8 | ||||
| -rw-r--r-- | miasm2/arch/x86/regs.py | 4 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore.py | 16 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore_cc_base.py | 13 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore_llvm.py | 14 |
8 files changed, 49 insertions, 37 deletions
diff --git a/miasm2/analysis/dse.py b/miasm2/analysis/dse.py index 329323e2..41872f5f 100644 --- a/miasm2/analysis/dse.py +++ b/miasm2/analysis/dse.py @@ -337,12 +337,23 @@ class DSEEngine(object): return True + def _get_gpregs(self): + """Return a dict of regs: value from the jitter + This version use the regs associated to the attrib (!= cpu.get_gpreg()) + """ + out = {} + regs = self.ir_arch.arch.regs.attrib_to_regs[self.ir_arch.attrib] + for reg in regs: + if hasattr(self.jitter.cpu, reg.name): + out[reg.name] = getattr(self.jitter.cpu, reg.name) + return out + def take_snapshot(self): """Return a snapshot of the current state (including jitter state)""" snapshot = { "mem": self.jitter.vm.get_all_memory(), - "regs": self.jitter.cpu.get_gpreg(), - "symb": self.symb.symbols.copy() + "regs": self._get_gpregs(), + "symb": self.symb.symbols.copy(), } return snapshot @@ -362,7 +373,8 @@ class DSEEngine(object): # Restore registers self.jitter.pc = snapshot["regs"][self.ir_arch.pc.name] - self.jitter.cpu.set_gpreg(snapshot["regs"]) + for reg, value in snapshot["regs"].iteritems(): + setattr(self.jitter.cpu, reg, value) # Reset intern elements self.jitter.vm.set_exception(0) diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py index d5209e3e..81a9a978 100644 --- a/miasm2/arch/aarch64/sem.py +++ b/miasm2/arch/aarch64/sem.py @@ -669,6 +669,11 @@ def br(arg1): PC = arg1 ir.IRDst = arg1 +@sbuild.parse +def blr(arg1): + PC = arg1 + ir.IRDst = arg1 + LR = m2_expr.ExprId(ir.get_next_label(instr), 64) @sbuild.parse def nop(): diff --git a/miasm2/arch/arm/jit.py b/miasm2/arch/arm/jit.py index 545d60de..b07f2a38 100644 --- a/miasm2/arch/arm/jit.py +++ b/miasm2/arch/arm/jit.py @@ -38,10 +38,12 @@ class jitter_arml(jitter): ret_ad = self.cpu.LR return ret_ad, args - def func_ret_stdcall(self, ret_addr, ret_value=None): + def func_ret_stdcall(self, ret_addr, ret_value1=None, ret_value2=None): self.pc = self.cpu.PC = ret_addr - if ret_value is not None: - self.cpu.R0 = ret_value + if ret_value1 is not None: + self.cpu.R0 = ret_value1 + if ret_value2 is not None: + self.cpu.R1 = ret_value2 return True def func_prepare_stdcall(self, ret_addr, *args): diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py index d39f1f38..50501060 100644 --- a/miasm2/arch/x86/jit.py +++ b/miasm2/arch/x86/jit.py @@ -135,10 +135,12 @@ class jitter_x86_32(jitter): args = [self.get_stack_arg(i) for i in xrange(n_args)] return ret_ad, args - def func_ret_cdecl(self, ret_addr, ret_value=None): + def func_ret_cdecl(self, ret_addr, ret_value1=None, ret_value2=None): self.pc = self.cpu.EIP = ret_addr - if ret_value is not None: - self.cpu.EAX = ret_value + if ret_value1 is not None: + self.cpu.EAX = ret_value1 + if ret_value2 is not None: + self.cpu.EDX = ret_value2 get_arg_n_cdecl = get_stack_arg diff --git a/miasm2/arch/x86/regs.py b/miasm2/arch/x86/regs.py index 7354457f..5db75e37 100644 --- a/miasm2/arch/x86/regs.py +++ b/miasm2/arch/x86/regs.py @@ -425,8 +425,8 @@ all_regs_ids_no_alias = [ ] + fltregs32_expr attrib_to_regs = { - 16: regs16_expr + all_regs_ids_no_alias[all_regs_ids_no_alias.index(zf):], - 32: regs32_expr + all_regs_ids_no_alias[all_regs_ids_no_alias.index(zf):], + 16: regs16_expr + all_regs_ids_no_alias[all_regs_ids_no_alias.index(zf):] + [IP], + 32: regs32_expr + all_regs_ids_no_alias[all_regs_ids_no_alias.index(zf):] + [EIP], 64: all_regs_ids_no_alias, } diff --git a/miasm2/jitter/jitcore.py b/miasm2/jitter/jitcore.py index 6c4d197e..741760cd 100644 --- a/miasm2/jitter/jitcore.py +++ b/miasm2/jitter/jitcore.py @@ -15,6 +15,8 @@ # with this program; if not, write to the Free Software Foundation, Inc., # 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. # +from hashlib import md5 + from miasm2.core import asmblock from miasm2.core.interval import interval from miasm2.core.utils import BoundedDict @@ -35,6 +37,7 @@ class JitCore(object): """ self.ir_arch = ir_arch + self.arch_name = "%s%s" % (self.ir_arch.arch.name, self.ir_arch.attrib) self.bs = bs self.known_blocs = {} self.lbl2jitbloc = BoundedDict(self.jitted_block_max_size, @@ -267,3 +270,16 @@ class JitCore(object): for addr_start, addr_stop in vm.get_memory_write(): mem_range.append((addr_start, addr_stop)) self.updt_automod_code_range(vm, mem_range) + + def hash_block(self, block): + """ + Build a hash of the block @block + @block: asmblock + """ + block_raw = "".join(line.b for line in block.lines) + block_hash = md5("%X_%s_%s_%s_%s" % (block.label.offset, + self.arch_name, + self.log_mn, + self.log_regs, + block_raw)).hexdigest() + return block_hash diff --git a/miasm2/jitter/jitcore_cc_base.py b/miasm2/jitter/jitcore_cc_base.py index 0ca2392d..9280d952 100644 --- a/miasm2/jitter/jitcore_cc_base.py +++ b/miasm2/jitter/jitcore_cc_base.py @@ -3,7 +3,6 @@ import os import tempfile from distutils.sysconfig import get_python_inc -from hashlib import md5 from miasm2.jitter.jitcore import JitCore from miasm2.core.utils import keydefaultdict @@ -109,15 +108,3 @@ class JitCore_Cc_Base(JitCore): @staticmethod def gen_C_source(ir_arch, func_code): raise NotImplementedError() - - def hash_block(self, block): - """ - Build a hash of the block @block - @block: asmblock - """ - block_raw = "".join(line.b for line in block.lines) - block_hash = md5("%X_%s_%s_%s" % (block.label.offset, - self.log_mn, - self.log_regs, - block_raw)).hexdigest() - return block_hash diff --git a/miasm2/jitter/jitcore_llvm.py b/miasm2/jitter/jitcore_llvm.py index 7765ad39..53f1b37f 100644 --- a/miasm2/jitter/jitcore_llvm.py +++ b/miasm2/jitter/jitcore_llvm.py @@ -1,7 +1,7 @@ import os import importlib import tempfile -from hashlib import md5 + from miasm2.jitter.llvmconvert import * import miasm2.jitter.jitcore as jitcore import Jitllvm @@ -117,15 +117,3 @@ class JitCore_LLVM(jitcore.JitCore): # Store a pointer on the function jitted code self.lbl2jitbloc[block.label.offset] = ptr - - def hash_block(self, block): - """ - Build a hash of the block @block - @block: asmblock - """ - block_raw = "".join(line.b for line in block.lines) - block_hash = md5("%X_%s_%s_%s" % (block.label.offset, - self.log_mn, - self.log_regs, - block_raw)).hexdigest() - return block_hash |