diff options
| -rw-r--r-- | miasm2/expression/expression.py | 62 | ||||
| -rw-r--r-- | test/arch/sh4/arch.py | 4 | ||||
| -rw-r--r-- | test/arch/x86/arch.py | 510 |
3 files changed, 303 insertions, 273 deletions
diff --git a/miasm2/expression/expression.py b/miasm2/expression/expression.py index 591dc024..d31c509c 100644 --- a/miasm2/expression/expression.py +++ b/miasm2/expression/expression.py @@ -56,6 +56,38 @@ EXPRSLICE = 7 EXPRCOMPOSE = 8 +priorities_list = [ + [ '+' ], + [ '*', '/', '%' ], + [ '**' ], + [ '-' ], # Unary '-', associativity with + not handled +] + +# dictionary from 'op' to priority, derived from above +priorities = dict((op, prio) + for prio, l in enumerate(priorities_list) + for op in l) +PRIORITY_MAX = len(priorities_list) - 1 + +def should_parenthesize_child(child, parent): + if (isinstance(child, ExprId) or isinstance(child, ExprInt) or + isinstance(child, ExprCompose) or isinstance(child, ExprMem) or + isinstance(child, ExprSlice)): + return False + elif isinstance(child, ExprOp) and not child.is_infix(): + return False + elif (isinstance(child, ExprCond) or isinstance(parent, ExprSlice)): + return True + elif (isinstance(child, ExprOp) and isinstance(parent, ExprOp)): + pri_child = priorities.get(child.op, -1) + pri_parent = priorities.get(parent.op, PRIORITY_MAX + 1) + return pri_child < pri_parent + else: + return True + +def str_protected_child(child, parent): + return ("(%s)" % child) if should_parenthesize_child(child, parent) else str(child) + def visit_chk(visitor): "Function decorator launching callback on Expression visit" def wrapped(expr, callback, test_visit=lambda x: True): @@ -687,7 +719,7 @@ class ExprCond(Expr): return Expr.get_object(cls, (cond, src1, src2)) def __str__(self): - return "(%s?(%s,%s))" % (str(self._cond), str(self._src1), str(self._src2)) + return "%s?(%s,%s)" % (str_protected_child(self._cond, self), str(self._src1), str(self._src2)) def get_r(self, mem_read=False, cst_read=False): out_src1 = self.src1.get_r(mem_read, cst_read) @@ -919,20 +951,13 @@ class ExprOp(Expr): return Expr.get_object(cls, (op, args)) def __str__(self): - if self.is_associative(): - return '(' + self._op.join([str(arg) for arg in self._args]) + ')' - if (self._op.startswith('call_func_') or - self._op == 'cpuid' or - len(self._args) > 2 or - self._op in ['parity', 'segm']): - return self._op + '(' + ', '.join([str(arg) for arg in self._args]) + ')' - if len(self._args) == 2: - return ('(' + str(self._args[0]) + - ' ' + self.op + ' ' + str(self._args[1]) + ')') - else: - return reduce(lambda x, y: x + ' ' + str(y), - self._args, - '(' + str(self._op)) + ')' + if self._op == '-': # Unary minus + return '-' + str_protected_child(self._args[0], self) + if self.is_associative() or self.is_infix(): + return (' ' + self._op + ' ').join([str_protected_child(arg, self) + for arg in self._args]) + return (self._op + '(' + + ', '.join([str(arg) for arg in self._args]) + ')') def get_r(self, mem_read=False, cst_read=False): return reduce(lambda elements, arg: @@ -960,6 +985,11 @@ class ExprOp(Expr): def is_function_call(self): return self._op.startswith('call') + def is_infix(self): + return self._op in [ '-', '+', '*', '^', '&', '|', '>>', '<<', + 'a>>', '>>>', '<<<', '/', '%', '**', + '<u', '<s', '<=u', '<=s', '==' ] + def is_associative(self): "Return True iff current operation is associative" return (self._op in ['+', '*', '^', '&', '|']) @@ -1026,7 +1056,7 @@ class ExprSlice(Expr): return Expr.get_object(cls, (arg, start, stop)) def __str__(self): - return "%s[%d:%d]" % (str(self._arg), self._start, self._stop) + return "%s[%d:%d]" % (str_protected_child(self._arg, self), self._start, self._stop) def get_r(self, mem_read=False, cst_read=False): return self._arg.get_r(mem_read, cst_read) diff --git a/test/arch/sh4/arch.py b/test/arch/sh4/arch.py index 7d3d890e..4d173add 100644 --- a/test/arch/sh4/arch.py +++ b/test/arch/sh4/arch.py @@ -13,7 +13,7 @@ reg_tests_sh4 = [ "ffe0"), ("c800226a MOV.W @(PC,0xC0), R9", "5e99"), - ("c8002006 MOV.L @(PC&0xFFFFFFFC,0x10), R15", + ("c8002006 MOV.L @(PC & 0xFFFFFFFC,0x10), R15", "03df"), ("c800cfc4 MOV R4, R9", "4369"), @@ -75,7 +75,7 @@ reg_tests_sh4 = [ "04c5"), ("xxxxxxxx MOV.L @(GBR,0x10), R0", "04c6"), - #("xxxxxxxx MOV PC&0xFFFFFFFC+0x14, R0", + #("xxxxxxxx MOV PC & 0xFFFFFFFC+0x14, R0", # "04c7"), ("xxxxxxxx SWAPB R2, R1", "2861"), diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py index 76e5a5eb..694e18c0 100644 --- a/test/arch/x86/arch.py +++ b/test/arch/x86/arch.py @@ -79,7 +79,7 @@ reg_tests = [ "0fea02"), (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EBX]", "0fea03"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX+EDX*0x4]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX + EDX * 0x4]", "0fea0490"), (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [0x90909090]", "0fea0590909090"), @@ -95,7 +95,7 @@ reg_tests = [ "0fea0a"), (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EBX]", "0fea0b"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX+EDX*0x4]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX + EDX * 0x4]", "0fea0c90"), (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [0x90909090]", "0fea0d90909090"), @@ -111,7 +111,7 @@ reg_tests = [ "0fea12"), (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EBX]", "0fea13"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX+EDX*0x4]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX + EDX * 0x4]", "0fea1490"), (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [0x90909090]", "0fea1590909090"), @@ -127,7 +127,7 @@ reg_tests = [ "0fea1a"), (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EBX]", "0fea1b"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX+EDX*0x4]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX + EDX * 0x4]", "0fea1c90"), (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [0x90909090]", "0fea1d90909090"), @@ -143,7 +143,7 @@ reg_tests = [ "0fea22"), (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EBX]", "0fea23"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX+EDX*0x4]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX + EDX * 0x4]", "0fea2490"), (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [0x90909090]", "0fea2590909090"), @@ -159,7 +159,7 @@ reg_tests = [ "0fea2a"), (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EBX]", "0fea2b"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX+EDX*0x4]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX + EDX * 0x4]", "0fea2c90"), (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [0x90909090]", "0fea2d90909090"), @@ -175,7 +175,7 @@ reg_tests = [ "0fea32"), (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EBX]", "0fea33"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX+EDX*0x4]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX + EDX * 0x4]", "0fea3490"), (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [0x90909090]", "0fea3590909090"), @@ -191,7 +191,7 @@ reg_tests = [ "0fea3a"), (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EBX]", "0fea3b"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX+EDX*0x4]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX + EDX * 0x4]", "0fea3c90"), (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [0x90909090]", "0fea3d90909090"), @@ -199,261 +199,261 @@ reg_tests = [ "0fea3e"), (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EDI]", "0fea3f"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX + 0xFFFFFF90]", "0fea4090"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [ECX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [ECX + 0xFFFFFF90]", "0fea4190"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EDX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EDX + 0xFFFFFF90]", "0fea4290"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EBX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EBX + 0xFFFFFF90]", "0fea4390"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX + EDX * 0x4 + 0xFFFFFF90]", "0fea449090"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EBP+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EBP + 0xFFFFFF90]", "0fea4590"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [ESI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [ESI + 0xFFFFFF90]", "0fea4690"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EDI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EDI + 0xFFFFFF90]", "0fea4790"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX + 0xFFFFFF90]", "0fea4890"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [ECX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [ECX + 0xFFFFFF90]", "0fea4990"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EDX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EDX + 0xFFFFFF90]", "0fea4a90"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EBX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EBX + 0xFFFFFF90]", "0fea4b90"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX + EDX * 0x4 + 0xFFFFFF90]", "0fea4c9090"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EBP+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EBP + 0xFFFFFF90]", "0fea4d90"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [ESI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [ESI + 0xFFFFFF90]", "0fea4e90"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EDI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EDI + 0xFFFFFF90]", "0fea4f90"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX + 0xFFFFFF90]", "0fea5090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [ECX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [ECX + 0xFFFFFF90]", "0fea5190"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EDX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EDX + 0xFFFFFF90]", "0fea5290"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EBX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EBX + 0xFFFFFF90]", "0fea5390"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX + EDX * 0x4 + 0xFFFFFF90]", "0fea549090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EBP+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EBP + 0xFFFFFF90]", "0fea5590"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [ESI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [ESI + 0xFFFFFF90]", "0fea5690"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EDI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EDI + 0xFFFFFF90]", "0fea5790"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX + 0xFFFFFF90]", "0fea5890"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [ECX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [ECX + 0xFFFFFF90]", "0fea5990"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EDX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EDX + 0xFFFFFF90]", "0fea5a90"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EBX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EBX + 0xFFFFFF90]", "0fea5b90"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX + EDX * 0x4 + 0xFFFFFF90]", "0fea5c9090"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EBP+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EBP + 0xFFFFFF90]", "0fea5d90"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [ESI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [ESI + 0xFFFFFF90]", "0fea5e90"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EDI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EDI + 0xFFFFFF90]", "0fea5f90"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX + 0xFFFFFF90]", "0fea6090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [ECX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [ECX + 0xFFFFFF90]", "0fea6190"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EDX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EDX + 0xFFFFFF90]", "0fea6290"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EBX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EBX + 0xFFFFFF90]", "0fea6390"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX + EDX * 0x4 + 0xFFFFFF90]", "0fea649090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EBP+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EBP + 0xFFFFFF90]", "0fea6590"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [ESI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [ESI + 0xFFFFFF90]", "0fea6690"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EDI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EDI + 0xFFFFFF90]", "0fea6790"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX + 0xFFFFFF90]", "0fea6890"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [ECX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [ECX + 0xFFFFFF90]", "0fea6990"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EDX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EDX + 0xFFFFFF90]", "0fea6a90"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EBX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EBX + 0xFFFFFF90]", "0fea6b90"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX + EDX * 0x4 + 0xFFFFFF90]", "0fea6c9090"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EBP+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EBP + 0xFFFFFF90]", "0fea6d90"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [ESI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [ESI + 0xFFFFFF90]", "0fea6e90"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EDI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EDI + 0xFFFFFF90]", "0fea6f90"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX + 0xFFFFFF90]", "0fea7090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [ECX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [ECX + 0xFFFFFF90]", "0fea7190"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EDX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EDX + 0xFFFFFF90]", "0fea7290"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EBX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EBX + 0xFFFFFF90]", "0fea7390"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX + EDX * 0x4 + 0xFFFFFF90]", "0fea749090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EBP+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EBP + 0xFFFFFF90]", "0fea7590"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [ESI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [ESI + 0xFFFFFF90]", "0fea7690"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EDI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EDI + 0xFFFFFF90]", "0fea7790"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX + 0xFFFFFF90]", "0fea7890"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [ECX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [ECX + 0xFFFFFF90]", "0fea7990"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EDX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EDX + 0xFFFFFF90]", "0fea7a90"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EBX+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EBX + 0xFFFFFF90]", "0fea7b90"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX + EDX * 0x4 + 0xFFFFFF90]", "0fea7c9090"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EBP+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EBP + 0xFFFFFF90]", "0fea7d90"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [ESI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [ESI + 0xFFFFFF90]", "0fea7e90"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EDI+0xFFFFFF90]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EDI + 0xFFFFFF90]", "0fea7f90"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX + 0x90909090]", "0fea8090909090"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [ECX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [ECX + 0x90909090]", "0fea8190909090"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EDX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EDX + 0x90909090]", "0fea8290909090"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EBX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EBX + 0x90909090]", "0fea8390909090"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX+EDX*0x4+0x90909090]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EAX + EDX * 0x4 + 0x90909090]", "0fea849090909090"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EBP+0x90909090]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EBP + 0x90909090]", "0fea8590909090"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [ESI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [ESI + 0x90909090]", "0fea8690909090"), - (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EDI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM0, QWORD PTR [EDI + 0x90909090]", "0fea8790909090"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX + 0x90909090]", "0fea8890909090"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [ECX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [ECX + 0x90909090]", "0fea8990909090"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EDX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EDX + 0x90909090]", "0fea8a90909090"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EBX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EBX + 0x90909090]", "0fea8b90909090"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX+EDX*0x4+0x90909090]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EAX + EDX * 0x4 + 0x90909090]", "0fea8c9090909090"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EBP+0x90909090]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EBP + 0x90909090]", "0fea8d90909090"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [ESI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [ESI + 0x90909090]", "0fea8e90909090"), - (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EDI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM1, QWORD PTR [EDI + 0x90909090]", "0fea8f90909090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX + 0x90909090]", "0fea9090909090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [ECX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [ECX + 0x90909090]", "0fea9190909090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EDX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EDX + 0x90909090]", "0fea9290909090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EBX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EBX + 0x90909090]", "0fea9390909090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX+EDX*0x4+0x90909090]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EAX + EDX * 0x4 + 0x90909090]", "0fea949090909090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EBP+0x90909090]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EBP + 0x90909090]", "0fea9590909090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [ESI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [ESI + 0x90909090]", "0fea9690909090"), - (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EDI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM2, QWORD PTR [EDI + 0x90909090]", "0fea9790909090"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX + 0x90909090]", "0fea9890909090"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [ECX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [ECX + 0x90909090]", "0fea9990909090"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EDX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EDX + 0x90909090]", "0fea9a90909090"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EBX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EBX + 0x90909090]", "0fea9b90909090"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX+EDX*0x4+0x90909090]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EAX + EDX * 0x4 + 0x90909090]", "0fea9c9090909090"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EBP+0x90909090]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EBP + 0x90909090]", "0fea9d90909090"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [ESI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [ESI + 0x90909090]", "0fea9e90909090"), - (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EDI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM3, QWORD PTR [EDI + 0x90909090]", "0fea9f90909090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX + 0x90909090]", "0feaa090909090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [ECX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [ECX + 0x90909090]", "0feaa190909090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EDX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EDX + 0x90909090]", "0feaa290909090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EBX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EBX + 0x90909090]", "0feaa390909090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX+EDX*0x4+0x90909090]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EAX + EDX * 0x4 + 0x90909090]", "0feaa49090909090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EBP+0x90909090]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EBP + 0x90909090]", "0feaa590909090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [ESI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [ESI + 0x90909090]", "0feaa690909090"), - (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EDI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM4, QWORD PTR [EDI + 0x90909090]", "0feaa790909090"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX + 0x90909090]", "0feaa890909090"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [ECX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [ECX + 0x90909090]", "0feaa990909090"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EDX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EDX + 0x90909090]", "0feaaa90909090"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EBX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EBX + 0x90909090]", "0feaab90909090"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX+EDX*0x4+0x90909090]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EAX + EDX * 0x4 + 0x90909090]", "0feaac9090909090"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EBP+0x90909090]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EBP + 0x90909090]", "0feaad90909090"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [ESI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [ESI + 0x90909090]", "0feaae90909090"), - (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EDI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM5, QWORD PTR [EDI + 0x90909090]", "0feaaf90909090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX + 0x90909090]", "0feab090909090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [ECX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [ECX + 0x90909090]", "0feab190909090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EDX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EDX + 0x90909090]", "0feab290909090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EBX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EBX + 0x90909090]", "0feab390909090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX+EDX*0x4+0x90909090]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EAX + EDX * 0x4 + 0x90909090]", "0feab49090909090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EBP+0x90909090]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EBP + 0x90909090]", "0feab590909090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [ESI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [ESI + 0x90909090]", "0feab690909090"), - (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EDI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM6, QWORD PTR [EDI + 0x90909090]", "0feab790909090"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX + 0x90909090]", "0feab890909090"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [ECX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [ECX + 0x90909090]", "0feab990909090"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EDX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EDX + 0x90909090]", "0feaba90909090"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EBX+0x90909090]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EBX + 0x90909090]", "0feabb90909090"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX+EDX*0x4+0x90909090]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EAX + EDX * 0x4 + 0x90909090]", "0feabc9090909090"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EBP+0x90909090]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EBP + 0x90909090]", "0feabd90909090"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [ESI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [ESI + 0x90909090]", "0feabe90909090"), - (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EDI+0x90909090]", + (m32, "XXXXXXXX PMINSW MM7, QWORD PTR [EDI + 0x90909090]", "0feabf90909090"), (m32, "XXXXXXXX PMINSW MM0, MM0", "0feac0"), @@ -618,23 +618,23 @@ reg_tests = [ "15fcffffff"), (m64, "00000000 ADC RAX, 0xFFFFFFFFFFFFFFFC", "4815fcffffff"), - (m16, "00000000 ADC WORD PTR [BX+SI], 0x1122", + (m16, "00000000 ADC WORD PTR [BX + SI], 0x1122", "81102211"), (m32, "00000000 ADC DWORD PTR [EAX], 0x11223344", "811044332211"), - (m32, "00000000 ADC DWORD PTR [EAX+EBX+0xFFFFFFFE], 0x11223344", + (m32, "00000000 ADC DWORD PTR [EAX + EBX + 0xFFFFFFFE], 0x11223344", "815418fe44332211"), - (m32, "00000000 ADC DWORD PTR [EAX+EBX+0x55667788], 0x11223344", + (m32, "00000000 ADC DWORD PTR [EAX + EBX + 0x55667788], 0x11223344", "8194188877665544332211"), (m64, "00000000 ADC DWORD PTR [RAX], 0x11223344", "811044332211"), (m64, "00000000 ADC QWORD PTR [RAX], 0x11223344", "48811044332211"), - (m64, "00000000 ADC QWORD PTR [RAX+RBX], 0x11223344", + (m64, "00000000 ADC QWORD PTR [RAX + RBX], 0x11223344", "4881141844332211"), - (m64, "00000000 ADC QWORD PTR [RAX+RBX+0x55667788], 0x11223344", + (m64, "00000000 ADC QWORD PTR [RAX + RBX + 0x55667788], 0x11223344", "488194188877665544332211"), - (m64, "00000000 ADC QWORD PTR [RAX+RBX+0xFFFFFFFFFFFFFFFE], 0x11223344", + (m64, "00000000 ADC QWORD PTR [RAX + RBX + 0xFFFFFFFFFFFFFFFE], 0x11223344", "48815403fe44332211"), (m64, "00000000 ADC QWORD PTR [EAX], 0x11223344", "6748811044332211"), @@ -646,21 +646,21 @@ reg_tests = [ "81d244332211"), (m64, "00000000 ADC RDX, 0x11223344", "4881d244332211"), - (m32, "00000000 ADC DWORD PTR [EAX+EBX], 0x11223344", + (m32, "00000000 ADC DWORD PTR [EAX + EBX], 0x11223344", "81141844332211"), - (m32, "00000000 ADC DWORD PTR [EAX+EBX], EAX", + (m32, "00000000 ADC DWORD PTR [EAX + EBX], EAX", "110418"), - (m64, "00000000 ADC QWORD PTR [RAX+RBX], RAX", + (m64, "00000000 ADC QWORD PTR [RAX + RBX], RAX", "48110418"), - (m32, "00000000 ADC BYTE PTR [EAX+EBX], AL", + (m32, "00000000 ADC BYTE PTR [EAX + EBX], AL", "100418"), - (m32, "00000000 ADC AL, BYTE PTR [EAX+EBX]", + (m32, "00000000 ADC AL, BYTE PTR [EAX + EBX]", "120418"), - (m16, "00000000 ADC WORD PTR [BX+SI], DX", + (m16, "00000000 ADC WORD PTR [BX + SI], DX", "1110"), - (m32, "00000000 ADC WORD PTR [BX+SI], DX", + (m32, "00000000 ADC WORD PTR [BX + SI], DX", "66671110"), - (m16, "00000000 ADC DWORD PTR [EBX+ESI], EDX", + (m16, "00000000 ADC DWORD PTR [EBX + ESI], EDX", "6667111433"), # prefix test @@ -670,40 +670,40 @@ reg_tests = [ (m32, "00000000 ADC EAX, 0x11223344", "1544332211"), - (m16, "00000000 ADC WORD PTR [BX+DI], 0x1", + (m16, "00000000 ADC WORD PTR [BX + DI], 0x1", "831101"), - (m32, "00000000 ADC DWORD PTR [EAX+EBX+0xFFFFFFFE], 0x1", + (m32, "00000000 ADC DWORD PTR [EAX + EBX + 0xFFFFFFFE], 0x1", "835403fe01"), - (m32, "00000000 ADC WORD PTR [EAX+EBX+0xFFFFFFFE], 0x1", + (m32, "00000000 ADC WORD PTR [EAX + EBX + 0xFFFFFFFE], 0x1", "66835403fe01"), - (m64, "00000000 ADC DWORD PTR [RAX+RBX+0xFFFFFFFFFFFFFFFE], 0x1", + (m64, "00000000 ADC DWORD PTR [RAX + RBX + 0xFFFFFFFFFFFFFFFE], 0x1", "835403fe01"), # - (m32, "00000000 ADC DWORD PTR [EAX+EBX*0x4+0xFFFFFFFE], 0x1", + (m32, "00000000 ADC DWORD PTR [EAX + EBX * 0x4 + 0xFFFFFFFE], 0x1", "835498fe01"), - (m64, "00000000 ADC QWORD PTR [RAX+RBX], R8", + (m64, "00000000 ADC QWORD PTR [RAX + RBX], R8", "4c110418"), - (m64, "00000000 ADC QWORD PTR [RAX+RBX], R15", + (m64, "00000000 ADC QWORD PTR [RAX + RBX], R15", "4c113c18"), (m64, "00000000 ADC QWORD PTR [R8], RAX", "491100"), - (m64, "00000000 ADC QWORD PTR [R8+R9], RAX", + (m64, "00000000 ADC QWORD PTR [R8 + R9], RAX", "4b110408"), - (m64, "00000000 ADC QWORD PTR [R8+RBP], RAX", + (m64, "00000000 ADC QWORD PTR [R8 + RBP], RAX", "49110428"), - (m64, "00000000 ADC QWORD PTR [RBP+R8*0x4], RAX", + (m64, "00000000 ADC QWORD PTR [RBP + R8 * 0x4], RAX", "4a11448500"), - (m64, "00000000 ADC QWORD PTR [RBP+R12*0x4], RAX", + (m64, "00000000 ADC QWORD PTR [RBP + R12 * 0x4], RAX", "4a1144a500"), - (m64, "00000000 ADC QWORD PTR [RSP+R12*0x4], RAX", + (m64, "00000000 ADC QWORD PTR [RSP + R12 * 0x4], RAX", "4a1104a4"), - (m64, "00000000 ADC QWORD PTR [R12*0x5], RAX", + (m64, "00000000 ADC QWORD PTR [R12 * 0x5], RAX", "4b1104a4"), - (m64, "00000000 ADC QWORD PTR [R12*0x5+0x11], RAX", + (m64, "00000000 ADC QWORD PTR [R12 * 0x5 + 0x11], RAX", "4b1144a411"), - (m64, "00000000 ADC QWORD PTR [RBP+R12*0x4+0x10], RAX", + (m64, "00000000 ADC QWORD PTR [RBP + R12 * 0x4 + 0x10], RAX", "4a1144a510"), (m32, "00000000 ADD AL, 0x11", @@ -767,9 +767,9 @@ reg_tests = [ "ff10"), (m32, "00000000 CALL EAX", "ffd0"), - (m32, "00000000 CALL DWORD PTR [EAX+EBX]", + (m32, "00000000 CALL DWORD PTR [EAX + EBX]", "ff1403"), - (m32, "00000000 CALL DWORD PTR [EAX+EBX+0x11223344]", + (m32, "00000000 CALL DWORD PTR [EAX + EBX + 0x11223344]", "ff941844332211"), @@ -783,28 +783,28 @@ reg_tests = [ (m32, "00000000 CALL 0x6655:0xFF332211", "9a112233FF5566"), - (m64, "00000000 CALL QWORD PTR [RAX+RBX]", + (m64, "00000000 CALL QWORD PTR [RAX + RBX]", "ff1403"), - (m64, "00000000 CALL QWORD PTR [RAX+RBX+0x11223344]", + (m64, "00000000 CALL QWORD PTR [RAX + RBX + 0x11223344]", "ff941844332211"), - (m64, "XXXXXXXX CALL QWORD PTR [EAX+EBX]", + (m64, "XXXXXXXX CALL QWORD PTR [EAX + EBX]", "67ff1418"), (m64, "XXXXXXXX CALL QWORD PTR [0x11223344]", "ff142544332211"), - (m64, "XXXXXXXX CALL QWORD PTR [RIP+0x11223344]", + (m64, "XXXXXXXX CALL QWORD PTR [RIP + 0x11223344]", "ff1544332211"), (m32, "00000000 CALL FAR DWORD PTR [EAX]", "ff18"), - (m32, "00000000 CALL FAR DWORD PTR [EAX+EBX]", + (m32, "00000000 CALL FAR DWORD PTR [EAX + EBX]", "ff1c03"), - (m32, "00000000 CALL FAR DWORD PTR [EAX+EBX+0x11223344]", + (m32, "00000000 CALL FAR DWORD PTR [EAX + EBX + 0x11223344]", "ff9c1844332211"), (m32, "00000000 CALL FAR DWORD PTR [0xFFFFFFA3]", "FF1DA3FFFFFF"), - (m64, "00000000 CALL FAR QWORD PTR [RIP+0xFFFFFFFFFFFFFFA3]", + (m64, "00000000 CALL FAR QWORD PTR [RIP + 0xFFFFFFFFFFFFFFA3]", "FF1DA3FFFFFF"), (m16, "00000000 CBW", @@ -858,13 +858,13 @@ reg_tests = [ "0fb000"), (m32, "00000000 CMPXCHG DWORD PTR [EAX], EAX", "0fb100"), - (m16, "00000000 CMPXCHG8B QWORD PTR [SI+0x24]", + (m16, "00000000 CMPXCHG8B QWORD PTR [SI + 0x24]", "0fc74c24"), - (m32, "00000000 CMPXCHG8B QWORD PTR [ESP+0x8]", + (m32, "00000000 CMPXCHG8B QWORD PTR [ESP + 0x8]", "0fc74c2408"), - (m64, "00000000 CMPXCHG8B QWORD PTR [RSP+0x8]", + (m64, "00000000 CMPXCHG8B QWORD PTR [RSP + 0x8]", "0fc74c2408"), - (m64, "00000000 CMPXCHG16B QWORD PTR [RSP+0x8]", + (m64, "00000000 CMPXCHG16B QWORD PTR [RSP + 0x8]", "480fc74c2408"), (m32, "00000000 CDQ", @@ -895,7 +895,7 @@ reg_tests = [ (m32, "00000000 FABS", "D9e1"), - (m16, "00000000 FADD DWORD PTR [BX+SI]", + (m16, "00000000 FADD DWORD PTR [BX + SI]", "D800"), (m32, "00000000 FADD DWORD PTR [EAX]", "D800"), @@ -910,7 +910,7 @@ reg_tests = [ (m32, "00000000 FADDP ST(2), ST", "DEC2"), - (m16, "00000000 FIADD DWORD PTR [BX+SI]", + (m16, "00000000 FIADD DWORD PTR [BX + SI]", "DA00"), (m32, "00000000 FIADD DWORD PTR [EAX]", "DA00"), @@ -992,7 +992,7 @@ reg_tests = [ "d9f6"), - (m16, "00000000 FDIV DWORD PTR [BX+SI]", + (m16, "00000000 FDIV DWORD PTR [BX + SI]", "D830"), (m32, "00000000 FDIV DWORD PTR [EAX]", "D830"), @@ -1007,7 +1007,7 @@ reg_tests = [ (m32, "00000000 FDIVP ST(2), ST", "DEFA"), - (m16, "00000000 FIDIV DWORD PTR [BX+SI]", + (m16, "00000000 FIDIV DWORD PTR [BX + SI]", "DA30"), (m32, "00000000 FIDIV DWORD PTR [EAX]", "DA30"), @@ -1016,7 +1016,7 @@ reg_tests = [ - (m16, "00000000 FDIVR DWORD PTR [BX+SI]", + (m16, "00000000 FDIVR DWORD PTR [BX + SI]", "D838"), (m32, "00000000 FDIVR DWORD PTR [EAX]", "D838"), @@ -1031,7 +1031,7 @@ reg_tests = [ (m32, "00000000 FDIVRP ST(2), ST", "DEF2"), - (m16, "00000000 FIDIVR DWORD PTR [BX+SI]", + (m16, "00000000 FIDIVR DWORD PTR [BX + SI]", "DA38"), (m32, "00000000 FIDIVR DWORD PTR [EAX]", "DA38"), @@ -1120,7 +1120,7 @@ reg_tests = [ - (m16, "00000000 FMUL DWORD PTR [BX+SI]", + (m16, "00000000 FMUL DWORD PTR [BX + SI]", "D808"), (m32, "00000000 FMUL DWORD PTR [EAX]", "D808"), @@ -1135,7 +1135,7 @@ reg_tests = [ (m32, "00000000 FMULP ST(2), ST", "DECa"), - (m16, "00000000 FIMUL DWORD PTR [BX+SI]", + (m16, "00000000 FIMUL DWORD PTR [BX + SI]", "DA08"), (m32, "00000000 FIMUL DWORD PTR [EAX]", "DA08"), @@ -1210,7 +1210,7 @@ reg_tests = [ (m32, "00000000 FNSTSW AX", "dfe0"), - (m16, "00000000 FSUB DWORD PTR [BX+SI]", + (m16, "00000000 FSUB DWORD PTR [BX + SI]", "D820"), (m32, "00000000 FSUB DWORD PTR [EAX]", "D820"), @@ -1225,7 +1225,7 @@ reg_tests = [ (m32, "00000000 FSUBP ST(2), ST", "DEEA"), - (m16, "00000000 FISUB DWORD PTR [BX+SI]", + (m16, "00000000 FISUB DWORD PTR [BX + SI]", "DA20"), (m32, "00000000 FISUB DWORD PTR [EAX]", "DA20"), @@ -1234,7 +1234,7 @@ reg_tests = [ - (m16, "00000000 FSUBR DWORD PTR [BX+SI]", + (m16, "00000000 FSUBR DWORD PTR [BX + SI]", "D828"), (m32, "00000000 FSUBR DWORD PTR [EAX]", "D828"), @@ -1249,7 +1249,7 @@ reg_tests = [ (m32, "00000000 FSUBRP ST(2), ST", "DEE2"), - (m16, "00000000 FISUBR DWORD PTR [BX+SI]", + (m16, "00000000 FISUBR DWORD PTR [BX + SI]", "DA28"), (m32, "00000000 FISUBR DWORD PTR [EAX]", "DA28"), @@ -1396,7 +1396,7 @@ reg_tests = [ "8bc3"), - (m16, "00000000 MOV WORD PTR [BX+SI], ES", + (m16, "00000000 MOV WORD PTR [BX + SI], ES", "8c00"), (m32, "00000000 MOV DWORD PTR [EAX], ES", "8c00"), @@ -1443,17 +1443,17 @@ reg_tests = [ (m32, "00000000 MOV DR0, EAX", "0f23c0"), - (m64, "00000000 MOV DWORD PTR [RSP+0x20], 0x10", + (m64, "00000000 MOV DWORD PTR [RSP + 0x20], 0x10", "C744242010000000"), - (m64, "00000000 MOV DWORD PTR [RBX+0x20], 0x30", + (m64, "00000000 MOV DWORD PTR [RBX + 0x20], 0x30", "c744a32030000000"), - (m64, "00000000 MOV DWORD PTR [R12+0x20], 0x10", + (m64, "00000000 MOV DWORD PTR [R12 + 0x20], 0x10", "41C744242010000000"), - (m32, "00000000 MOV BYTE PTR [EBX+0xFFFFFF98], 0xCC", + (m32, "00000000 MOV BYTE PTR [EBX + 0xFFFFFF98], 0xCC", "C64398CC"), - (m64, "00000000 MOV BYTE PTR [R11+0xFFFFFFFFFFFFFF98], 0xCC", + (m64, "00000000 MOV BYTE PTR [R11 + 0xFFFFFFFFFFFFFF98], 0xCC", "41C64398CC"), (m64, "00000000 MOV RAX, 0x1122334455667788", @@ -1483,7 +1483,7 @@ reg_tests = [ (m64, "00000000 MOV R8D, R11D", "4789d8"), - (m64, "00000000 MOV BYTE PTR [RBX+0x3], R11B", + (m64, "00000000 MOV BYTE PTR [RBX + 0x3], R11B", "44885B03"), (m32, "00000000 MOV AL, BYTE PTR [0x11223344]", @@ -1548,9 +1548,9 @@ reg_tests = [ (m64, "00000000 MOVSX RAX, WORD PTR [RAX]", "480fbf00"), - (m16, "00000000 MOVZX AX, BYTE PTR [BX+SI]", + (m16, "00000000 MOVZX AX, BYTE PTR [BX + SI]", "0fb600"), - (m16, "00000000 MOVZX AX, WORD PTR [BX+SI]", + (m16, "00000000 MOVZX AX, WORD PTR [BX + SI]", "0fb700"), (m32, "00000000 MOVZX EAX, BYTE PTR [EAX]", @@ -1595,13 +1595,13 @@ reg_tests = [ (m64, "00000000 LODSQ", "48ad"), - (m32, "XXXXXXXX LEA EAX, DWORD PTR [EAX+EBX]", + (m32, "XXXXXXXX LEA EAX, DWORD PTR [EAX + EBX]", "8d0418"), - (m32, "XXXXXXXX LEA EAX, DWORD PTR [EAX+EBX+0x11223344]", + (m32, "XXXXXXXX LEA EAX, DWORD PTR [EAX + EBX + 0x11223344]", "8d841844332211"), - (m32, "XXXXXXXX LEA EAX, DWORD PTR [EDX+0x18]", + (m32, "XXXXXXXX LEA EAX, DWORD PTR [EDX + 0x18]", "8d4218"), - (m32, "XXXXXXXX LEA ECX, DWORD PTR [EAX*0x2]", + (m32, "XXXXXXXX LEA ECX, DWORD PTR [EAX * 0x2]", "8d0c00"), @@ -1669,9 +1669,9 @@ reg_tests = [ # "f390"), - (m16, "00000000 POPW WORD PTR [BX+SI]", + (m16, "00000000 POPW WORD PTR [BX + SI]", "8f00"), - (m32, "00000000 POPW WORD PTR [BX+SI]", + (m32, "00000000 POPW WORD PTR [BX + SI]", "66678f00"), (m32, "00000000 POP DWORD PTR [EAX]", "8f00"), @@ -1761,7 +1761,7 @@ reg_tests = [ "50"), (m64, "00000000 PUSH R10", "4152"), - (m16, "00000000 PUSHW WORD PTR [BX+SI]", + (m16, "00000000 PUSHW WORD PTR [BX + SI]", "FF30"), (m16, "00000000 PUSHW WORD PTR [EAX]", "67FF30"), @@ -2165,7 +2165,7 @@ reg_tests = [ "2A00"), (m32, "00000000 SUB EAX, DWORD PTR [EAX]", "2B00"), - (m32, "00000000 SUB EBX, DWORD PTR [EBP+0xFFFFF858]", + (m32, "00000000 SUB EBX, DWORD PTR [EBP + 0xFFFFF858]", "2b9d58f8ffff"), @@ -2263,42 +2263,42 @@ reg_tests = [ (m32, "00000000 XORPS XMM1, XMM2", "0f57ca"), - (m32, "00000000 XORPS XMM1, XMMWORD PTR [EDI+0x42]", + (m32, "00000000 XORPS XMM1, XMMWORD PTR [EDI + 0x42]", "0f574f42"), (m32, "00000000 XORPD XMM1, XMM2", "660f57ca"), (m32, "00000000 ORPS XMM1, XMM2", "0f56ca"), - (m32, "00000000 ORPS XMM1, XMMWORD PTR [EDI+0x42]", + (m32, "00000000 ORPS XMM1, XMMWORD PTR [EDI + 0x42]", "0f564f42"), (m32, "00000000 ORPD XMM1, XMM2", "660f56ca"), - (m32, "00000000 MOVAPS XMMWORD PTR [EBP+0xFFFFFFB8], XMM0", + (m32, "00000000 MOVAPS XMMWORD PTR [EBP + 0xFFFFFFB8], XMM0", "0f2945b8"), - (m32, "00000000 MOVAPS XMM0, XMMWORD PTR [EBP+0xFFFFFFB8]", + (m32, "00000000 MOVAPS XMM0, XMMWORD PTR [EBP + 0xFFFFFFB8]", "0f2845b8"), - (m32, "00000000 MOVAPD XMMWORD PTR [EBP+0xFFFFFFB8], XMM0", + (m32, "00000000 MOVAPD XMMWORD PTR [EBP + 0xFFFFFFB8], XMM0", "660f2945b8"), - (m32, "00000000 MOVLPD XMM0, QWORD PTR [ESP+0x4]", + (m32, "00000000 MOVLPD XMM0, QWORD PTR [ESP + 0x4]", "660F12442404"), - (m32, "00000000 MOVLPS XMM0, QWORD PTR [ESP+0x4]", + (m32, "00000000 MOVLPS XMM0, QWORD PTR [ESP + 0x4]", "0F12442404"), - (m32, "00000000 MOVLPD QWORD PTR [ESP+0x4], XMM0", + (m32, "00000000 MOVLPD QWORD PTR [ESP + 0x4], XMM0", "660F13442404"), - (m32, "00000000 MOVLPS QWORD PTR [ESP+0x4], XMM0", + (m32, "00000000 MOVLPS QWORD PTR [ESP + 0x4], XMM0", "0F13442404"), - (m32, "00000000 MOVHPD XMM0, QWORD PTR [ESP+0x4]", + (m32, "00000000 MOVHPD XMM0, QWORD PTR [ESP + 0x4]", "660F16442404"), - (m32, "00000000 MOVHPS XMM0, QWORD PTR [ESP+0x4]", + (m32, "00000000 MOVHPS XMM0, QWORD PTR [ESP + 0x4]", "0F16442404"), - (m32, "00000000 MOVHPD QWORD PTR [ESP+0x4], XMM0", + (m32, "00000000 MOVHPD QWORD PTR [ESP + 0x4], XMM0", "660F17442404"), - (m32, "00000000 MOVHPS QWORD PTR [ESP+0x4], XMM0", + (m32, "00000000 MOVHPS QWORD PTR [ESP + 0x4], XMM0", "0F17442404"), (m32, "00000000 MOVLHPS XMM2, XMM1", @@ -2311,23 +2311,23 @@ reg_tests = [ (m32, "00000000 MOVUPS XMM2, XMMWORD PTR [ECX]", "0f1011"), - (m64, "00000000 MOVUPS XMMWORD PTR [RCX+0x50], XMM1", + (m64, "00000000 MOVUPS XMMWORD PTR [RCX + 0x50], XMM1", "0f114950"), (m32, "00000000 MOVSD XMM2, QWORD PTR [ECX]", "f20f1011"), (m32, "00000000 MOVSD XMM2, XMM1", "f20f10d1"), - (m32, "00000000 MOVSD QWORD PTR [EBP+0xFFFFFFD8], XMM0", + (m32, "00000000 MOVSD QWORD PTR [EBP + 0xFFFFFFD8], XMM0", "f20f1145d8"), (m32, "00000000 MOVSS XMM2, DWORD PTR [ECX]", "f30f1011"), (m32, "00000000 MOVUPD XMM2, XMMWORD PTR [ECX]", "660f1011"), - (m32, "00000000 MOVSS DWORD PTR [EBP+0xFFFFFC00], XMM0", + (m32, "00000000 MOVSS DWORD PTR [EBP + 0xFFFFFC00], XMM0", "f30f118500fcffff"), - (m64, "00000000 MOVSS DWORD PTR [RBP+0xFFFFFFFFFFFFFC00], XMM0", + (m64, "00000000 MOVSS DWORD PTR [RBP + 0xFFFFFFFFFFFFFC00], XMM0", "f30f118500fcffff"), (m64, "00000000 MOVMSKPS EAX, XMM2", @@ -2356,27 +2356,27 @@ reg_tests = [ "0fefc1"), (m32, "00000000 PXOR XMM0, XMM1", "660fefc1"), - (m32, "00000000 PXOR XMM6, XMMWORD PTR [ECX+0x10]", + (m32, "00000000 PXOR XMM6, XMMWORD PTR [ECX + 0x10]", "660fef7110"), - (m32, "00000000 UCOMISD XMM0, QWORD PTR [EBP+0xFFFFFFD8]", + (m32, "00000000 UCOMISD XMM0, QWORD PTR [EBP + 0xFFFFFFD8]", "660f2e45d8"), - (m32, "00000000 ANDPS XMM0, XMMWORD PTR [EBX+0x2CBD27]", + (m32, "00000000 ANDPS XMM0, XMMWORD PTR [EBX + 0x2CBD27]", "0f548327bd2c00"), - (m32, "00000000 ANDPD XMM0, XMMWORD PTR [EBX+0x2CBD27]", + (m32, "00000000 ANDPD XMM0, XMMWORD PTR [EBX + 0x2CBD27]", "660f548327bd2c00"), - (m32, "00000000 ANDNPS XMM0, XMMWORD PTR [EBX+0x2CBD27]", + (m32, "00000000 ANDNPS XMM0, XMMWORD PTR [EBX + 0x2CBD27]", "0f558327bd2c00"), - (m32, "00000000 ANDNPD XMM0, XMMWORD PTR [EBX+0x2CBD27]", + (m32, "00000000 ANDNPD XMM0, XMMWORD PTR [EBX + 0x2CBD27]", "660f558327bd2c00"), (m32, "00000000 SUBSD XMM1, XMM0", "f20f5cc8"), - (m32, "00000000 MAXSD XMM0, QWORD PTR [EBX+0x2CBD37]", + (m32, "00000000 MAXSD XMM0, QWORD PTR [EBX + 0x2CBD37]", "f20f5f8337bd2c00"), - (m32, "00000000 MAXSS XMM0, DWORD PTR [EBX+0x2CBD37]", + (m32, "00000000 MAXSS XMM0, DWORD PTR [EBX + 0x2CBD37]", "f30f5f8337bd2c00"), (m32, "00000000 CVTDQ2PD XMM0, XMM3", @@ -2480,34 +2480,34 @@ reg_tests = [ (m32, "00000000 XGETBV", "0f01d0"), - (m32, "00000000 MOVD MM4, DWORD PTR [EAX+EDX*0x8]", + (m32, "00000000 MOVD MM4, DWORD PTR [EAX + EDX * 0x8]", "0f6e24d0"), - (m32, "00000000 MOVD DWORD PTR [EAX+EDX*0x8], MM4", + (m32, "00000000 MOVD DWORD PTR [EAX + EDX * 0x8], MM4", "0f7e24d0"), - (m64, "00000000 MOVD DWORD PTR [RAX+RDX*0x8], MM4", + (m64, "00000000 MOVD DWORD PTR [RAX + RDX * 0x8], MM4", "0f7e24d0"), - (m64, "00000000 MOVD DWORD PTR [RAX+R10*0x8], MM4", + (m64, "00000000 MOVD DWORD PTR [RAX + R10 * 0x8], MM4", "420f7e24d0"), - (m32, "00000000 MOVD XMM4, DWORD PTR [EAX+EDX*0x8]", + (m32, "00000000 MOVD XMM4, DWORD PTR [EAX + EDX * 0x8]", "660f6e24d0"), - (m32, "00000000 MOVD DWORD PTR [EAX+EDX*0x8], XMM4", + (m32, "00000000 MOVD DWORD PTR [EAX + EDX * 0x8], XMM4", "660f7e24d0"), - (m64, "00000000 MOVD DWORD PTR [RAX+RDX*0x8], XMM4", + (m64, "00000000 MOVD DWORD PTR [RAX + RDX * 0x8], XMM4", "660f7e24d0"), - (m64, "00000000 MOVD DWORD PTR [RAX+R10*0x8], XMM4", + (m64, "00000000 MOVD DWORD PTR [RAX + R10 * 0x8], XMM4", "66420f7e24d0"), - (m32, "00000002 MOVQ XMM4, QWORD PTR [EAX+EDX*0x8]", + (m32, "00000002 MOVQ XMM4, QWORD PTR [EAX + EDX * 0x8]", "F30F7E24D0"), - (m32, "00000008 MOVQ QWORD PTR [EAX+EDX*0x8], XMM4", + (m32, "00000008 MOVQ QWORD PTR [EAX + EDX * 0x8], XMM4", "660FD624D0"), - (m32, "0000000E MOVQ QWORD PTR [EAX+EDX*0x8], MM4", + (m32, "0000000E MOVQ QWORD PTR [EAX + EDX * 0x8], MM4", "0F7F24D0"), - (m64, "00000000 MOVQ XMM4, QWORD PTR [RAX+R10*0x8]", + (m64, "00000000 MOVQ XMM4, QWORD PTR [RAX + R10 * 0x8]", "f3420f7e24d0"), - (m64, "00000000 MOVQ XMM1, QWORD PTR [R12+0xFFFFFFFFFFFFFFE0]", + (m64, "00000000 MOVQ XMM1, QWORD PTR [R12 + 0xFFFFFFFFFFFFFFE0]", "f3410f7e4c24e0"), (m64, "00000000 MOVQ RCX, XMM0", @@ -2538,9 +2538,9 @@ reg_tests = [ (m32, "00000000 POR XMM0, XMM1", "660febc1"), - (m32, "00000000 POR XMM6, XMMWORD PTR [ECX+0x10]", + (m32, "00000000 POR XMM6, XMMWORD PTR [ECX + 0x10]", "660febb110000000"), - (m32, "00000000 POR MM6, QWORD PTR [ECX+0x10]", + (m32, "00000000 POR MM6, QWORD PTR [ECX + 0x10]", "0febb110000000"), (m32, "00000000 MOVDQU XMM1, XMMWORD PTR [ESI]", @@ -2559,9 +2559,9 @@ reg_tests = [ (m32, "00000000 LGS EDI, DWORD PTR [ESI]", "0FB53E"), - (m16, "00000000 LES SI, WORD PTR [BX+SI]", + (m16, "00000000 LES SI, WORD PTR [BX + SI]", "C430"), - (m16, "00000000 LDS SI, WORD PTR [BX+SI]", + (m16, "00000000 LDS SI, WORD PTR [BX + SI]", "C530"), #### MMX/SSE/AVX operations @@ -2583,9 +2583,9 @@ reg_tests = [ (m32, "00000000 PADDQ XMM0, XMM1", "660fd4c1"), - (m32, "00000007 PADDB MM4, QWORD PTR [EAX+EDX*0x8]", + (m32, "00000007 PADDB MM4, QWORD PTR [EAX + EDX * 0x8]", "0FFC24D0"), - (m32, "0000000B PADDB XMM4, XMMWORD PTR [EAX+EDX*0x8]", + (m32, "0000000B PADDB XMM4, XMMWORD PTR [EAX + EDX * 0x8]", "660FFC24D0"), (m32, "00000000 PADDB MM0, MM1", @@ -2656,12 +2656,12 @@ reg_tests = [ ## # SSE - (m32, "00000000 CVTSS2SD XMM0, DWORD PTR [EBP+0xFFFFFFD0]", + (m32, "00000000 CVTSS2SD XMM0, DWORD PTR [EBP + 0xFFFFFFD0]", "f30f5a45d0"), - (m32, "00000001 CVTSD2SS XMM4, QWORD PTR [EAX+EDX*0x8]", + (m32, "00000001 CVTSD2SS XMM4, QWORD PTR [EAX + EDX * 0x8]", "F20F5A24D0"), - (m32, "00000006 CVTSS2SD XMM4, DWORD PTR [EAX+EDX*0x8]", + (m32, "00000006 CVTSS2SD XMM4, DWORD PTR [EAX + EDX * 0x8]", "F30F5A24D0"), @@ -2671,7 +2671,7 @@ reg_tests = [ "410f2fc0"), (m64, "00000000 COMISS XMM0, DWORD PTR [RAX]", "0f2f00"), - (m64, "00000000 COMISS XMM0, DWORD PTR [RSP+0x34]", + (m64, "00000000 COMISS XMM0, DWORD PTR [RSP + 0x34]", "0F2F442434"), (m32, "00000000 COMISD XMM7, XMM6", "660F2FFE"), |