diff options
| -rw-r--r-- | miasm2/arch/mips32/regs.py | 5 | ||||
| -rw-r--r-- | miasm2/jitter/arch/JitCore_mips32.h | 514 |
2 files changed, 517 insertions, 2 deletions
diff --git a/miasm2/arch/mips32/regs.py b/miasm2/arch/mips32/regs.py index 7c049cd9..6ddcf25b 100644 --- a/miasm2/arch/mips32/regs.py +++ b/miasm2/arch/mips32/regs.py @@ -43,6 +43,7 @@ cpr0_str[40] = "PAGEMASK" cpr0_str[72] = "COUNT" cpr0_str[80] = "ENTRYHI" cpr0_str[104] = "CAUSE" +cpr0_str[112] = "EPC" cpr0_str[128] = "CONFIG" cpr0_str[152] = "WATCHHI" @@ -54,10 +55,10 @@ regs_fcc_expr, regs_fcc_init, fccregs = gen_regs(regs_fcc_str, globals()) all_regs_ids = [PC, PC_FETCH, R_LO, R_HI] + gpregs_expr + regs_flt_expr + \ - regs_fcc_expr + regs_fcc_expr + regs_cpr0_expr all_regs_ids_byname = dict([(x.name, x) for x in all_regs_ids]) all_regs_ids_init = [PC_init, PC_FETCH_init, R_LO_init, R_HI_init] + \ - gpregs_init + regs_flt_init + regs_fcc_init + gpregs_init + regs_flt_init + regs_fcc_init + regs_cpr0_init all_regs_ids_no_alias = all_regs_ids[:] regs_init = {} diff --git a/miasm2/jitter/arch/JitCore_mips32.h b/miasm2/jitter/arch/JitCore_mips32.h index 6b7a6200..de98f069 100644 --- a/miasm2/jitter/arch/JitCore_mips32.h +++ b/miasm2/jitter/arch/JitCore_mips32.h @@ -235,6 +235,520 @@ typedef struct { double F30_new; double F31_new; + uint32_t INDEX; + uint32_t CPR0_1; + uint32_t CPR0_2; + uint32_t CPR0_3; + uint32_t CPR0_4; + uint32_t CPR0_5; + uint32_t CPR0_6; + uint32_t CPR0_7; + uint32_t CPR0_8; + uint32_t CPR0_9; + uint32_t CPR0_10; + uint32_t CPR0_11; + uint32_t CPR0_12; + uint32_t CPR0_13; + uint32_t CPR0_14; + uint32_t CPR0_15; + uint32_t ENTRYLO0; + uint32_t CPR0_17; + uint32_t CPR0_18; + uint32_t CPR0_19; + uint32_t CPR0_20; + uint32_t CPR0_21; + uint32_t CPR0_22; + uint32_t CPR0_23; + uint32_t ENTRYLO1; + uint32_t CPR0_25; + uint32_t CPR0_26; + uint32_t CPR0_27; + uint32_t CPR0_28; + uint32_t CPR0_29; + uint32_t CPR0_30; + uint32_t CPR0_31; + uint32_t CPR0_32; + uint32_t CPR0_33; + uint32_t CPR0_34; + uint32_t CPR0_35; + uint32_t CPR0_36; + uint32_t CPR0_37; + uint32_t CPR0_38; + uint32_t CPR0_39; + uint32_t PAGEMASK; + uint32_t CPR0_41; + uint32_t CPR0_42; + uint32_t CPR0_43; + uint32_t CPR0_44; + uint32_t CPR0_45; + uint32_t CPR0_46; + uint32_t CPR0_47; + uint32_t CPR0_48; + uint32_t CPR0_49; + uint32_t CPR0_50; + uint32_t CPR0_51; + uint32_t CPR0_52; + uint32_t CPR0_53; + uint32_t CPR0_54; + uint32_t CPR0_55; + uint32_t CPR0_56; + uint32_t CPR0_57; + uint32_t CPR0_58; + uint32_t CPR0_59; + uint32_t CPR0_60; + uint32_t CPR0_61; + uint32_t CPR0_62; + uint32_t CPR0_63; + uint32_t CPR0_64; + uint32_t CPR0_65; + uint32_t CPR0_66; + uint32_t CPR0_67; + uint32_t CPR0_68; + uint32_t CPR0_69; + uint32_t CPR0_70; + uint32_t CPR0_71; + uint32_t COUNT; + uint32_t CPR0_73; + uint32_t CPR0_74; + uint32_t CPR0_75; + uint32_t CPR0_76; + uint32_t CPR0_77; + uint32_t CPR0_78; + uint32_t CPR0_79; + uint32_t ENTRYHI; + uint32_t CPR0_81; + uint32_t CPR0_82; + uint32_t CPR0_83; + uint32_t CPR0_84; + uint32_t CPR0_85; + uint32_t CPR0_86; + uint32_t CPR0_87; + uint32_t CPR0_88; + uint32_t CPR0_89; + uint32_t CPR0_90; + uint32_t CPR0_91; + uint32_t CPR0_92; + uint32_t CPR0_93; + uint32_t CPR0_94; + uint32_t CPR0_95; + uint32_t CPR0_96; + uint32_t CPR0_97; + uint32_t CPR0_98; + uint32_t CPR0_99; + uint32_t CPR0_100; + uint32_t CPR0_101; + uint32_t CPR0_102; + uint32_t CPR0_103; + uint32_t CAUSE; + uint32_t CPR0_105; + uint32_t CPR0_106; + uint32_t CPR0_107; + uint32_t CPR0_108; + uint32_t CPR0_109; + uint32_t CPR0_110; + uint32_t CPR0_111; + uint32_t EPC; + uint32_t CPR0_113; + uint32_t CPR0_114; + uint32_t CPR0_115; + uint32_t CPR0_116; + uint32_t CPR0_117; + uint32_t CPR0_118; + uint32_t CPR0_119; + uint32_t CPR0_120; + uint32_t CPR0_121; + uint32_t CPR0_122; + uint32_t CPR0_123; + uint32_t CPR0_124; + uint32_t CPR0_125; + uint32_t CPR0_126; + uint32_t CPR0_127; + uint32_t CONFIG; + uint32_t CPR0_129; + uint32_t CPR0_130; + uint32_t CPR0_131; + uint32_t CPR0_132; + uint32_t CPR0_133; + uint32_t CPR0_134; + uint32_t CPR0_135; + uint32_t CPR0_136; + uint32_t CPR0_137; + uint32_t CPR0_138; + uint32_t CPR0_139; + uint32_t CPR0_140; + uint32_t CPR0_141; + uint32_t CPR0_142; + uint32_t CPR0_143; + uint32_t CPR0_144; + uint32_t CPR0_145; + uint32_t CPR0_146; + uint32_t CPR0_147; + uint32_t CPR0_148; + uint32_t CPR0_149; + uint32_t CPR0_150; + uint32_t CPR0_151; + uint32_t WATCHHI; + uint32_t CPR0_153; + uint32_t CPR0_154; + uint32_t CPR0_155; + uint32_t CPR0_156; + uint32_t CPR0_157; + uint32_t CPR0_158; + uint32_t CPR0_159; + uint32_t CPR0_160; + uint32_t CPR0_161; + uint32_t CPR0_162; + uint32_t CPR0_163; + uint32_t CPR0_164; + uint32_t CPR0_165; + uint32_t CPR0_166; + uint32_t CPR0_167; + uint32_t CPR0_168; + uint32_t CPR0_169; + uint32_t CPR0_170; + uint32_t CPR0_171; + uint32_t CPR0_172; + uint32_t CPR0_173; + uint32_t CPR0_174; + uint32_t CPR0_175; + uint32_t CPR0_176; + uint32_t CPR0_177; + uint32_t CPR0_178; + uint32_t CPR0_179; + uint32_t CPR0_180; + uint32_t CPR0_181; + uint32_t CPR0_182; + uint32_t CPR0_183; + uint32_t CPR0_184; + uint32_t CPR0_185; + uint32_t CPR0_186; + uint32_t CPR0_187; + uint32_t CPR0_188; + uint32_t CPR0_189; + uint32_t CPR0_190; + uint32_t CPR0_191; + uint32_t CPR0_192; + uint32_t CPR0_193; + uint32_t CPR0_194; + uint32_t CPR0_195; + uint32_t CPR0_196; + uint32_t CPR0_197; + uint32_t CPR0_198; + uint32_t CPR0_199; + uint32_t CPR0_200; + uint32_t CPR0_201; + uint32_t CPR0_202; + uint32_t CPR0_203; + uint32_t CPR0_204; + uint32_t CPR0_205; + uint32_t CPR0_206; + uint32_t CPR0_207; + uint32_t CPR0_208; + uint32_t CPR0_209; + uint32_t CPR0_210; + uint32_t CPR0_211; + uint32_t CPR0_212; + uint32_t CPR0_213; + uint32_t CPR0_214; + uint32_t CPR0_215; + uint32_t CPR0_216; + uint32_t CPR0_217; + uint32_t CPR0_218; + uint32_t CPR0_219; + uint32_t CPR0_220; + uint32_t CPR0_221; + uint32_t CPR0_222; + uint32_t CPR0_223; + uint32_t CPR0_224; + uint32_t CPR0_225; + uint32_t CPR0_226; + uint32_t CPR0_227; + uint32_t CPR0_228; + uint32_t CPR0_229; + uint32_t CPR0_230; + uint32_t CPR0_231; + uint32_t CPR0_232; + uint32_t CPR0_233; + uint32_t CPR0_234; + uint32_t CPR0_235; + uint32_t CPR0_236; + uint32_t CPR0_237; + uint32_t CPR0_238; + uint32_t CPR0_239; + uint32_t CPR0_240; + uint32_t CPR0_241; + uint32_t CPR0_242; + uint32_t CPR0_243; + uint32_t CPR0_244; + uint32_t CPR0_245; + uint32_t CPR0_246; + uint32_t CPR0_247; + uint32_t CPR0_248; + uint32_t CPR0_249; + uint32_t CPR0_250; + uint32_t CPR0_251; + uint32_t CPR0_252; + uint32_t CPR0_253; + uint32_t CPR0_254; + uint32_t CPR0_255; + + uint32_t INDEX_new; + uint32_t CPR0_1_new; + uint32_t CPR0_2_new; + uint32_t CPR0_3_new; + uint32_t CPR0_4_new; + uint32_t CPR0_5_new; + uint32_t CPR0_6_new; + uint32_t CPR0_7_new; + uint32_t CPR0_8_new; + uint32_t CPR0_9_new; + uint32_t CPR0_10_new; + uint32_t CPR0_11_new; + uint32_t CPR0_12_new; + uint32_t CPR0_13_new; + uint32_t CPR0_14_new; + uint32_t CPR0_15_new; + uint32_t ENTRYLO0_new; + uint32_t CPR0_17_new; + uint32_t CPR0_18_new; + uint32_t CPR0_19_new; + uint32_t CPR0_20_new; + uint32_t CPR0_21_new; + uint32_t CPR0_22_new; + uint32_t CPR0_23_new; + uint32_t ENTRYLO1_new; + uint32_t CPR0_25_new; + uint32_t CPR0_26_new; + uint32_t CPR0_27_new; + uint32_t CPR0_28_new; + uint32_t CPR0_29_new; + uint32_t CPR0_30_new; + uint32_t CPR0_31_new; + uint32_t CPR0_32_new; + uint32_t CPR0_33_new; + uint32_t CPR0_34_new; + uint32_t CPR0_35_new; + uint32_t CPR0_36_new; + uint32_t CPR0_37_new; + uint32_t CPR0_38_new; + uint32_t CPR0_39_new; + uint32_t PAGEMASK_new; + uint32_t CPR0_41_new; + uint32_t CPR0_42_new; + uint32_t CPR0_43_new; + uint32_t CPR0_44_new; + uint32_t CPR0_45_new; + uint32_t CPR0_46_new; + uint32_t CPR0_47_new; + uint32_t CPR0_48_new; + uint32_t CPR0_49_new; + uint32_t CPR0_50_new; + uint32_t CPR0_51_new; + uint32_t CPR0_52_new; + uint32_t CPR0_53_new; + uint32_t CPR0_54_new; + uint32_t CPR0_55_new; + uint32_t CPR0_56_new; + uint32_t CPR0_57_new; + uint32_t CPR0_58_new; + uint32_t CPR0_59_new; + uint32_t CPR0_60_new; + uint32_t CPR0_61_new; + uint32_t CPR0_62_new; + uint32_t CPR0_63_new; + uint32_t CPR0_64_new; + uint32_t CPR0_65_new; + uint32_t CPR0_66_new; + uint32_t CPR0_67_new; + uint32_t CPR0_68_new; + uint32_t CPR0_69_new; + uint32_t CPR0_70_new; + uint32_t CPR0_71_new; + uint32_t COUNT_new; + uint32_t CPR0_73_new; + uint32_t CPR0_74_new; + uint32_t CPR0_75_new; + uint32_t CPR0_76_new; + uint32_t CPR0_77_new; + uint32_t CPR0_78_new; + uint32_t CPR0_79_new; + uint32_t ENTRYHI_new; + uint32_t CPR0_81_new; + uint32_t CPR0_82_new; + uint32_t CPR0_83_new; + uint32_t CPR0_84_new; + uint32_t CPR0_85_new; + uint32_t CPR0_86_new; + uint32_t CPR0_87_new; + uint32_t CPR0_88_new; + uint32_t CPR0_89_new; + uint32_t CPR0_90_new; + uint32_t CPR0_91_new; + uint32_t CPR0_92_new; + uint32_t CPR0_93_new; + uint32_t CPR0_94_new; + uint32_t CPR0_95_new; + uint32_t CPR0_96_new; + uint32_t CPR0_97_new; + uint32_t CPR0_98_new; + uint32_t CPR0_99_new; + uint32_t CPR0_100_new; + uint32_t CPR0_101_new; + uint32_t CPR0_102_new; + uint32_t CPR0_103_new; + uint32_t CAUSE_new; + uint32_t CPR0_105_new; + uint32_t CPR0_106_new; + uint32_t CPR0_107_new; + uint32_t CPR0_108_new; + uint32_t CPR0_109_new; + uint32_t CPR0_110_new; + uint32_t CPR0_111_new; + uint32_t EPC_new; + uint32_t CPR0_113_new; + uint32_t CPR0_114_new; + uint32_t CPR0_115_new; + uint32_t CPR0_116_new; + uint32_t CPR0_117_new; + uint32_t CPR0_118_new; + uint32_t CPR0_119_new; + uint32_t CPR0_120_new; + uint32_t CPR0_121_new; + uint32_t CPR0_122_new; + uint32_t CPR0_123_new; + uint32_t CPR0_124_new; + uint32_t CPR0_125_new; + uint32_t CPR0_126_new; + uint32_t CPR0_127_new; + uint32_t CONFIG_new; + uint32_t CPR0_129_new; + uint32_t CPR0_130_new; + uint32_t CPR0_131_new; + uint32_t CPR0_132_new; + uint32_t CPR0_133_new; + uint32_t CPR0_134_new; + uint32_t CPR0_135_new; + uint32_t CPR0_136_new; + uint32_t CPR0_137_new; + uint32_t CPR0_138_new; + uint32_t CPR0_139_new; + uint32_t CPR0_140_new; + uint32_t CPR0_141_new; + uint32_t CPR0_142_new; + uint32_t CPR0_143_new; + uint32_t CPR0_144_new; + uint32_t CPR0_145_new; + uint32_t CPR0_146_new; + uint32_t CPR0_147_new; + uint32_t CPR0_148_new; + uint32_t CPR0_149_new; + uint32_t CPR0_150_new; + uint32_t CPR0_151_new; + uint32_t WATCHHI_new; + uint32_t CPR0_153_new; + uint32_t CPR0_154_new; + uint32_t CPR0_155_new; + uint32_t CPR0_156_new; + uint32_t CPR0_157_new; + uint32_t CPR0_158_new; + uint32_t CPR0_159_new; + uint32_t CPR0_160_new; + uint32_t CPR0_161_new; + uint32_t CPR0_162_new; + uint32_t CPR0_163_new; + uint32_t CPR0_164_new; + uint32_t CPR0_165_new; + uint32_t CPR0_166_new; + uint32_t CPR0_167_new; + uint32_t CPR0_168_new; + uint32_t CPR0_169_new; + uint32_t CPR0_170_new; + uint32_t CPR0_171_new; + uint32_t CPR0_172_new; + uint32_t CPR0_173_new; + uint32_t CPR0_174_new; + uint32_t CPR0_175_new; + uint32_t CPR0_176_new; + uint32_t CPR0_177_new; + uint32_t CPR0_178_new; + uint32_t CPR0_179_new; + uint32_t CPR0_180_new; + uint32_t CPR0_181_new; + uint32_t CPR0_182_new; + uint32_t CPR0_183_new; + uint32_t CPR0_184_new; + uint32_t CPR0_185_new; + uint32_t CPR0_186_new; + uint32_t CPR0_187_new; + uint32_t CPR0_188_new; + uint32_t CPR0_189_new; + uint32_t CPR0_190_new; + uint32_t CPR0_191_new; + uint32_t CPR0_192_new; + uint32_t CPR0_193_new; + uint32_t CPR0_194_new; + uint32_t CPR0_195_new; + uint32_t CPR0_196_new; + uint32_t CPR0_197_new; + uint32_t CPR0_198_new; + uint32_t CPR0_199_new; + uint32_t CPR0_200_new; + uint32_t CPR0_201_new; + uint32_t CPR0_202_new; + uint32_t CPR0_203_new; + uint32_t CPR0_204_new; + uint32_t CPR0_205_new; + uint32_t CPR0_206_new; + uint32_t CPR0_207_new; + uint32_t CPR0_208_new; + uint32_t CPR0_209_new; + uint32_t CPR0_210_new; + uint32_t CPR0_211_new; + uint32_t CPR0_212_new; + uint32_t CPR0_213_new; + uint32_t CPR0_214_new; + uint32_t CPR0_215_new; + uint32_t CPR0_216_new; + uint32_t CPR0_217_new; + uint32_t CPR0_218_new; + uint32_t CPR0_219_new; + uint32_t CPR0_220_new; + uint32_t CPR0_221_new; + uint32_t CPR0_222_new; + uint32_t CPR0_223_new; + uint32_t CPR0_224_new; + uint32_t CPR0_225_new; + uint32_t CPR0_226_new; + uint32_t CPR0_227_new; + uint32_t CPR0_228_new; + uint32_t CPR0_229_new; + uint32_t CPR0_230_new; + uint32_t CPR0_231_new; + uint32_t CPR0_232_new; + uint32_t CPR0_233_new; + uint32_t CPR0_234_new; + uint32_t CPR0_235_new; + uint32_t CPR0_236_new; + uint32_t CPR0_237_new; + uint32_t CPR0_238_new; + uint32_t CPR0_239_new; + uint32_t CPR0_240_new; + uint32_t CPR0_241_new; + uint32_t CPR0_242_new; + uint32_t CPR0_243_new; + uint32_t CPR0_244_new; + uint32_t CPR0_245_new; + uint32_t CPR0_246_new; + uint32_t CPR0_247_new; + uint32_t CPR0_248_new; + uint32_t CPR0_249_new; + uint32_t CPR0_250_new; + uint32_t CPR0_251_new; + uint32_t CPR0_252_new; + uint32_t CPR0_253_new; + uint32_t CPR0_254_new; + uint32_t CPR0_255_new; + }vm_cpu_t; |