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-rw-r--r--miasm2/arch/mips32/sem.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py
index 932ba58b..bfccc343 100644
--- a/miasm2/arch/mips32/sem.py
+++ b/miasm2/arch/mips32/sem.py
@@ -1,7 +1,7 @@
 from miasm2.expression.expression import *
 from miasm2.ir.ir import ir, irbloc
 from miasm2.arch.mips32.arch import mn_mips32
-from miasm2.arch.mips32.regs import *
+from miasm2.arch.mips32.regs import R_LO, R_HI, PC, RA
 
 def addiu(ir, instr, a, b, c):
     """Adds a register @b and a sign-extended immediate value @c and stores the