diff options
| -rw-r--r-- | miasm2/analysis/machine.py | 17 | ||||
| -rw-r--r-- | miasm2/analysis/sandbox.py | 40 | ||||
| -rw-r--r-- | miasm2/jitter/jitload.py | 2 | ||||
| -rwxr-xr-x | setup.py | 9 |
4 files changed, 67 insertions, 1 deletions
diff --git a/miasm2/analysis/machine.py b/miasm2/analysis/machine.py index 778c5def..f963628c 100644 --- a/miasm2/analysis/machine.py +++ b/miasm2/analysis/machine.py @@ -12,7 +12,8 @@ class Machine(object): __gdbserver = None # GdbServer handler __available = ["arml", "armb", "armtl", "armtb", "sh4", "x86_16", "x86_32", - "x86_64", "msp430", "mips32b", "mips32l"] + "x86_64", "msp430", "mips32b", "mips32l", + "aarch64l", "aarch64b"] def __init__(self, machine_name): @@ -43,6 +44,20 @@ class Machine(object): jitter = jit.jitter_armb from miasm2.arch.arm.ira import ir_a_armb as ira from miasm2.arch.arm.sem import ir_armb as ir + elif machine_name == "aarch64l": + from miasm2.arch.aarch64.disasm import dis_aarch64l as dis_engine + from miasm2.arch.aarch64 import arch, jit + mn = arch.mn_aarch64 + jitter = jit.jitter_aarch64l + from miasm2.arch.aarch64.ira import ir_a_aarch64l as ira + from miasm2.arch.aarch64.sem import ir_aarch64l as ir + elif machine_name == "aarch64b": + from miasm2.arch.aarch64.disasm import dis_aarch64b as dis_engine + from miasm2.arch.aarch64 import arch, jit + mn = arch.mn_aarch64 + jitter = jit.jitter_aarch64b + from miasm2.arch.aarch64.ira import ir_a_aarch64b as ira + from miasm2.arch.aarch64.sem import ir_aarch64b as ir elif machine_name == "armtl": from miasm2.arch.arm.disasm import dis_armtl as dis_engine from miasm2.arch.arm import arch diff --git a/miasm2/analysis/sandbox.py b/miasm2/analysis/sandbox.py index 3bacda5e..7dc5d76e 100644 --- a/miasm2/analysis/sandbox.py +++ b/miasm2/analysis/sandbox.py @@ -317,6 +317,29 @@ class Arch_armb(Arch): self.jitter.stack_size = self.STACK_SIZE self.jitter.init_stack() +class Arch_aarch64l(Arch): + _ARCH_ = "aarch64l" + STACK_SIZE = 0x100000 + + def __init__(self): + super(Arch_aarch64l, self).__init__() + + # Init stack + self.jitter.stack_size = self.STACK_SIZE + self.jitter.init_stack() + + +class Arch_aarch64b(Arch): + _ARCH_ = "aarch64b" + STACK_SIZE = 0x100000 + + def __init__(self): + super(Arch_aarch64b, self).__init__() + + # Init stack + self.jitter.stack_size = self.STACK_SIZE + self.jitter.init_stack() + class Sandbox_Win_x86_32(Sandbox, Arch_x86_32, OS_Win): @@ -465,3 +488,20 @@ class Sandbox_Linux_arml_str(Sandbox, Arch_arml, OS_Linux_str): if addr is None and self.options.address is not None: addr = int(self.options.address, 16) super(Sandbox_Linux_arml_str, self).run(addr) + + +class Sandbox_Linux_aarch64l(Sandbox, Arch_aarch64l, OS_Linux): + + def __init__(self, *args, **kwargs): + Sandbox.__init__(self, *args, **kwargs) + + self.jitter.cpu.LR = 0x1337beef + + # Set the runtime guard + self.jitter.add_breakpoint(0x1337beef, self.__class__.code_sentinelle) + + + def run(self, addr = None): + if addr is None and self.options.address is not None: + addr = int(self.options.address, 16) + super(Sandbox_Linux_aarch64l, self).run(addr) diff --git a/miasm2/jitter/jitload.py b/miasm2/jitter/jitload.py index 6faa3a9f..1c88d0b7 100644 --- a/miasm2/jitter/jitload.py +++ b/miasm2/jitter/jitload.py @@ -186,6 +186,8 @@ class jitter: from miasm2.jitter.arch import JitCore_x86 as jcore elif arch_name == "arm": from miasm2.jitter.arch import JitCore_arm as jcore + elif arch_name == "aarch64": + from miasm2.jitter.arch import JitCore_aarch64 as jcore elif arch_name == "msp430": from miasm2.jitter.arch import JitCore_msp430 as jcore elif arch_name == "mips32": diff --git a/setup.py b/setup.py index f4618abc..3b504542 100755 --- a/setup.py +++ b/setup.py @@ -10,6 +10,7 @@ def buil_all(): 'miasm2/arch', 'miasm2/arch/x86', 'miasm2/arch/arm', + 'miasm2/arch/aarch64', 'miasm2/arch/msp430', 'miasm2/arch/sh4', 'miasm2/arch/mips32', @@ -35,6 +36,10 @@ def buil_all(): ["miasm2/jitter/JitCore.c", "miasm2/jitter/vm_mngr.c", "miasm2/jitter/arch/JitCore_arm.c"]), + Extension("miasm2.jitter.arch.JitCore_aarch64", + ["miasm2/jitter/JitCore.c", + "miasm2/jitter/vm_mngr.c", + "miasm2/jitter/arch/JitCore_aarch64.c"]), Extension("miasm2.jitter.arch.JitCore_msp430", ["miasm2/jitter/JitCore.c", "miasm2/jitter/vm_mngr.c", @@ -59,6 +64,10 @@ def buil_all(): ["miasm2/jitter/JitCore.c", "miasm2/jitter/vm_mngr.c", "miasm2/jitter/arch/JitCore_arm.c"]), + Extension("miasm2.jitter.arch.JitCore_aarch64", + ["miasm2/jitter/JitCore.c", + "miasm2/jitter/vm_mngr.c", + "miasm2/jitter/arch/JitCore_aarch64.c"]), Extension("miasm2.jitter.arch.JitCore_msp430", ["miasm2/jitter/JitCore.c", "miasm2/jitter/vm_mngr.c", |