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-rw-r--r--README.md2
-rw-r--r--doc/jitter/jitter.ipynb2
-rw-r--r--miasm/arch/aarch64/arch.py11
-rw-r--r--miasm/expression/expression.py4
-rw-r--r--miasm/jitter/vm_mngr.h2
-rw-r--r--setup.py2
-rw-r--r--test/arch/aarch64/arch.py8
-rw-r--r--test/expression/expression.py6
-rw-r--r--test/jitter/jitcore.py12
9 files changed, 33 insertions, 16 deletions
diff --git a/README.md b/README.md
index 50b8de59..63c1d4b9 100644
--- a/README.md
+++ b/README.md
@@ -516,7 +516,7 @@ instance to emulate library functions effects.
 Documentation
 =============
 
-TODO
+Some documentation ressources are available in the [doc](doc) folder.
 
 An auto-generated documentation is available:
 * [Doxygen](http://miasm.re/miasm_doxygen)
diff --git a/doc/jitter/jitter.ipynb b/doc/jitter/jitter.ipynb
index 02011437..adab4c5b 100644
--- a/doc/jitter/jitter.ipynb
+++ b/doc/jitter/jitter.ipynb
@@ -129,7 +129,7 @@
    "source": [
     "For now, our emulator is an empty box. It has:\n",
     "\n",
-    "* registers, reachable from the `.cpu` attribute. These are initiallized to 0.\n",
+    "* registers, reachable from the `.cpu` attribute. These are initialized to 0.\n",
     "* a virtual memory, reachable from the `.vm` attribute. It starts empty."
    ]
   },
diff --git a/miasm/arch/aarch64/arch.py b/miasm/arch/aarch64/arch.py
index 0ade16bf..5246d920 100644
--- a/miasm/arch/aarch64/arch.py
+++ b/miasm/arch/aarch64/arch.py
@@ -1424,7 +1424,7 @@ class aarch64_immhi_page(aarch64_imm_32):
     def encode(self):
         v = int(self.expr)
         if v & (1 << 63):
-            v &= (1 << 33) - 1
+            v &= (1 << 21) - 1
         self.parent.immlo.value = v & 3
         v >>= 2
         if v > (1 << 19) - 1:
@@ -1909,6 +1909,10 @@ adsu_name = {'ADD': 0, 'SUB': 1}
 bs_adsu_name = bs_name(l=1, name=adsu_name)
 
 
+adsus_name = {'ADDS': 0, 'SUBS': 1}
+bs_adsus_name = bs_name(l=1, name=adsus_name)
+
+
 offs19 = bs(l=19, cls=(aarch64_offs,), fname='off')
 offs19pc = bs(l=19, cls=(aarch64_offs_pc,), fname='off')
 
@@ -1939,8 +1943,9 @@ aarch64op("CMN", [sf, bs('0'), bs('1'), bs('01011'), shift, bs('0'), rm_sft, imm
 
 aarch64op("cmp", [sf, bs('1'), bs('1'), bs('01011'), shift, bs('0'), rm_sft, imm6, rn, bs('11111')], [rn, rm_sft], alias=True)
 # add/sub (reg ext)
-aarch64op("addsub", [sf, bs_adsu_name, modf, bs('01011'), bs('00'), bs('1'), rm_ext, option, imm3, rn, rd], [rd, rn, rm_ext])
-#aarch64op("cmp",    [sf, bs('1'), bs('1'), bs('01011'), bs('00'), bs('1'), rm_ext, option, imm3, rn, bs('11111')], [rn, rm_ext], alias=True)
+aarch64op("addsub", [sf, bs_adsu_name, bs('0'), bs('01011'), bs('00'), bs('1'), rm_ext, option, imm3, rn, rd], [rd, rn, rm_ext])
+aarch64op("addssubs", [sf, bs_adsus_name, bs('1'), bs('01011'), bs('00'), bs('1'), rm_ext, option, imm3, rn, rd_nosp], [rd_nosp, rn, rm_ext])
+aarch64op("cmp",    [sf, bs('1'), bs('1'), bs('01011'), bs('00'), bs('1'), rm_ext, option, imm3, rn, bs('11111')], [rn, rm_ext], alias=True)
 
 
 aarch64op("neg", [sf, bs('1'), modf, bs('01011'), shift, bs('0'), rm_sft, imm6, bs('11111'), rd], [rd, rm_sft], alias=True)
diff --git a/miasm/expression/expression.py b/miasm/expression/expression.py
index e5debb34..4b0bbe6b 100644
--- a/miasm/expression/expression.py
+++ b/miasm/expression/expression.py
@@ -568,11 +568,11 @@ class Expr(object):
     def __sub__(self, other):
         return ExprOp('+', self, ExprOp('-', other))
 
-    def __div__(self, other):
+    def __truediv__(self, other):
         return ExprOp('/', self, other)
 
     def __floordiv__(self, other):
-        return self.__div__(other)
+        return self.__truediv__(other)
 
     def __mod__(self, other):
         return ExprOp('%', self, other)
diff --git a/miasm/jitter/vm_mngr.h b/miasm/jitter/vm_mngr.h
index 4c8383c4..f7aea5b8 100644
--- a/miasm/jitter/vm_mngr.h
+++ b/miasm/jitter/vm_mngr.h
@@ -39,7 +39,7 @@
 #define __BYTE_ORDER __BYTE_ORDER__
 #define __BIG_ENDIAN BIG_ENDIAN
 #define __LITTLE_ENDIAN LITTLE_ENDIAN
-#elif defined(__NetBSD__) || defined(__OpenBSD__)
+#elif defined(__NetBSD__) || defined(__OpenBSD__) || defined(__FreeBSD__)
 #define __BYTE_ORDER _BYTE_ORDER
 #define __BIG_ENDIAN _BIG_ENDIAN
 #define __LITTLE_ENDIAN _LITTLE_ENDIAN
diff --git a/setup.py b/setup.py
index e1e54434..abecb1a1 100644
--- a/setup.py
+++ b/setup.py
@@ -416,7 +416,7 @@ _write_pkg_file_orig = DistributionMetadata.write_pkg_file
 
 
 def _write_pkg_file(self, file):
-    with TemporaryFile(mode="w+") as tmpfd:
+    with TemporaryFile(mode="w+", encoding="utf-8") as tmpfd:
         _write_pkg_file_orig(self, tmpfd)
         tmpfd.seek(0)
         for line in tmpfd:
diff --git a/test/arch/aarch64/arch.py b/test/arch/aarch64/arch.py
index 57ec9b14..7d81e45e 100644
--- a/test/arch/aarch64/arch.py
+++ b/test/arch/aarch64/arch.py
@@ -67,6 +67,9 @@ reg_tests_aarch64 = [
     ("0000D5AC    NEG        W6, W6",
      "E603064B"),
 
+    ("XXXXXXXX    CMP        W11, W12 UXTB 0x0",
+     "7F012C6B"),
+
 
     ("004028B8    CMP        X0, XZR",
      "1F001FEB"),
@@ -1843,7 +1846,10 @@ reg_tests_aarch64 = [
     ("XXXXXXXX    TLBI       0x0, c7, 0x0, XZR",
      "1F8708D5"),
     ("XXXXXXXX    YIELD      ",
-     "3F2003D5")
+     "3F2003D5"),
+
+    ("XXXXXXXX    ADR        X29, 0xFFFFFFFFFFFFFAC8",
+     "5DD6FF10"),
 ]
 
 
diff --git a/test/expression/expression.py b/test/expression/expression.py
index 9b0c2807..fa3cf0f7 100644
--- a/test/expression/expression.py
+++ b/test/expression/expression.py
@@ -80,16 +80,22 @@ assert mem.get_r(mem_read=True) == set([mem, A])
 
 C = A+B
 D = C + A
+E = A / B
+F = A // B
+assert E is F
 
 assert A in A
 assert A in C
 assert B in C
 assert C in C
+assert E in E
 
 assert A in D
 assert B in D
 assert C in D
 assert D in D
+assert A in E
+assert B in E
 
 assert C not in A
 assert C not in B
diff --git a/test/jitter/jitcore.py b/test/jitter/jitcore.py
index 1e009d9a..95245855 100644
--- a/test/jitter/jitcore.py
+++ b/test/jitter/jitcore.py
@@ -9,16 +9,16 @@ jitter = machine.jitter(loc_db, sys.argv[1])
 jitter.cpu.RAX = 16565615892967251934
 assert jitter.cpu.RAX == 16565615892967251934
 
-jitter.cpu.RAX = -1
+jitter.cpu.RAX = -1 & 0xffffffffffffffff
 assert jitter.cpu.RAX == 0xffffffffffffffff
 
-jitter.cpu.RAX = -2
+jitter.cpu.RAX = -2 & 0xffffffffffffffff
 assert jitter.cpu.RAX == 0xfffffffffffffffe
 
-jitter.cpu.EAX = -2
+jitter.cpu.EAX = -2 & 0xffffffff
 assert jitter.cpu.EAX == 0xfffffffe
 
-jitter.cpu.RAX = -0xffffffffffffffff
+jitter.cpu.RAX = -0xffffffffffffffff & 0xffffffffffffffff
 assert jitter.cpu.RAX == 1
 
 try:
@@ -35,10 +35,10 @@ except TypeError:
 else:
         raise Exception("Should see that 0x10000000000000000 is too big for RAX")
 
-jitter.cpu.EAX = -0xefffffff
+jitter.cpu.EAX = -0xefffffff & 0xffffffff
 assert jitter.cpu.EAX == 0x10000001
 
-jitter.cpu.EAX = -0xFFFFFFFF
+jitter.cpu.EAX = -0xFFFFFFFF & 0xffffffff
 assert jitter.cpu.EAX == 1
 
 try: