diff options
| -rw-r--r-- | example/ida/utils.py | 2 | ||||
| -rwxr-xr-x | example/samples/md5_ppc32b | bin | 0 -> 68500 bytes | |||
| -rw-r--r-- | miasm2/arch/ppc/ira.py | 13 | ||||
| -rw-r--r-- | miasm2/arch/ppc/sem.py | 1 | ||||
| -rw-r--r-- | miasm2/jitter/emulatedsymbexec.py | 9 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore_llvm.py | 1 | ||||
| -rw-r--r-- | miasm2/jitter/llvmconvert.py | 4 | ||||
| -rw-r--r-- | miasm2/jitter/loader/elf.py | 1 | ||||
| -rw-r--r-- | miasm2/jitter/vm_mngr_py.c | 13 | ||||
| -rwxr-xr-x | test/test_all.py | 5 |
10 files changed, 46 insertions, 3 deletions
diff --git a/example/ida/utils.py b/example/ida/utils.py index b147cde2..585d86a9 100644 --- a/example/ida/utils.py +++ b/example/ida/utils.py @@ -57,6 +57,8 @@ def guess_machine(): machine = Machine("mips32l") elif processor_name == "mipsb": machine = Machine("mips32b") + elif processor_name == "PPC": + machine = Machine("ppc32b") else: print repr(processor_name) raise NotImplementedError('not fully functional') diff --git a/example/samples/md5_ppc32b b/example/samples/md5_ppc32b new file mode 100755 index 00000000..dd24b964 --- /dev/null +++ b/example/samples/md5_ppc32b Binary files differdiff --git a/miasm2/arch/ppc/ira.py b/miasm2/arch/ppc/ira.py index 2459c0e4..76a979ae 100644 --- a/miasm2/arch/ppc/ira.py +++ b/miasm2/arch/ppc/ira.py @@ -22,6 +22,19 @@ class ir_a_ppc32b(ir_ppc32b, ira): for irblock in leaves: self.set_dead_regs(irblock) + def call_effects(self, ad, instr): + return [AssignBlock([ExprAff(self.ret_reg, ExprOp('call_func_ret', ad, + self.sp, + self.arch.regs.R3, + self.arch.regs.R4, + self.arch.regs.R5, + )), + ExprAff(self.sp, ExprOp('call_func_stack', + ad, self.sp)), + ], + instr + )] + def pre_add_instr(self, block, instr, assignments, ir_blocks_all, gen_pc_update): """Replace function call with corresponding call effects, inside the IR block""" diff --git a/miasm2/arch/ppc/sem.py b/miasm2/arch/ppc/sem.py index 3c9d0e83..4434efa7 100644 --- a/miasm2/arch/ppc/sem.py +++ b/miasm2/arch/ppc/sem.py @@ -845,6 +845,7 @@ class ir_ppc32b(IntermediateRepresentation): self.pc = mn_ppc.getpc() self.sp = mn_ppc.getsp() self.IRDst = expr.ExprId('IRDst', 32) + self.addrsize = 32 def get_ir(self, instr): args = instr.args[:] diff --git a/miasm2/jitter/emulatedsymbexec.py b/miasm2/jitter/emulatedsymbexec.py index 97f038dc..4107dc75 100644 --- a/miasm2/jitter/emulatedsymbexec.py +++ b/miasm2/jitter/emulatedsymbexec.py @@ -44,9 +44,11 @@ class EmulatedSymbExec(SymbolicExecutionEngine): addr = expr_mem.arg.arg.arg size = expr_mem.size / 8 value = self.cpu.get_mem(addr, size) + if self.vm.is_little_endian(): + value = value[::-1] self.vm.add_mem_read(addr, size) - return m2_expr.ExprInt(int(value[::-1].encode("hex"), 16), + return m2_expr.ExprInt(int(value.encode("hex"), 16), expr_mem.size) def _func_write(self, symb_exec, dest, data): @@ -66,7 +68,10 @@ class EmulatedSymbExec(SymbolicExecutionEngine): size = data.size / 8 content = hex(to_write).replace("0x", "").replace("L", "") content = "0" * (size * 2 - len(content)) + content - content = content.decode("hex")[::-1] + content = content.decode("hex") + + if self.vm.is_little_endian(): + content = content[::-1] # Write in VmMngr context self.cpu.set_mem(addr, content) diff --git a/miasm2/jitter/jitcore_llvm.py b/miasm2/jitter/jitcore_llvm.py index 53f1b37f..452b6d84 100644 --- a/miasm2/jitter/jitcore_llvm.py +++ b/miasm2/jitter/jitcore_llvm.py @@ -17,6 +17,7 @@ class JitCore_LLVM(jitcore.JitCore): "msp430": "JitCore_msp430.so", "mips32": "JitCore_mips32.so", "aarch64": "JitCore_aarch64.so", + "ppc32": "JitCore_ppc32.so", } def __init__(self, ir_arch, bs=None): diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py index 9796b265..0e4368a8 100644 --- a/miasm2/jitter/llvmconvert.py +++ b/miasm2/jitter/llvmconvert.py @@ -777,8 +777,10 @@ class LLVMFunction(): itype = LLVMType.IntType(expr.size) expr_size = itype(expr.size) + # As shift of expr_size is undefined, we urem the shifters shift = builder.urem(count, expr_size) - shift_inv = builder.sub(expr_size, shift) + shift_inv = builder.urem(builder.sub(expr_size, shift), + expr_size) if op == '<<<': part_a = builder.shl(value, shift) diff --git a/miasm2/jitter/loader/elf.py b/miasm2/jitter/loader/elf.py index 336f522a..deaebd09 100644 --- a/miasm2/jitter/loader/elf.py +++ b/miasm2/jitter/loader/elf.py @@ -100,6 +100,7 @@ ELF_machine = {(elf_csts.EM_ARM, 32, elf_csts.ELFDATA2LSB): "arml", (elf_csts.EM_386, 32, elf_csts.ELFDATA2LSB): "x86_32", (elf_csts.EM_X86_64, 64, elf_csts.ELFDATA2LSB): "x86_64", (elf_csts.EM_SH, 32, elf_csts.ELFDATA2LSB): "sh4", + (elf_csts.EM_PPC, 32, elf_csts.ELFDATA2MSB): "ppc32b", } diff --git a/miasm2/jitter/vm_mngr_py.c b/miasm2/jitter/vm_mngr_py.c index 35633b7f..fa69fab5 100644 --- a/miasm2/jitter/vm_mngr_py.c +++ b/miasm2/jitter/vm_mngr_py.c @@ -564,6 +564,17 @@ vm_set_little_endian(VmMngr *self, PyObject *value, void *closure) } +static PyObject * +vm_is_little_endian(VmMngr *self, PyObject *value, void *closure) +{ + if (self->vm_mngr.sex == __BIG_ENDIAN) { + return PyLong_FromUnsignedLongLong(0); + } else { + return PyLong_FromUnsignedLongLong(1); + } +} + + static void VmMngr_dealloc(VmMngr* self) { @@ -649,6 +660,8 @@ static PyMethodDef VmMngr_methods[] = { "set_big_endian() -> Set the VmMngr to Big Endian"}, {"set_little_endian",(PyCFunction)vm_set_little_endian, METH_VARARGS, "set_little_endian() -> Set the VmMngr to Little Endian"}, + {"is_little_endian",(PyCFunction)vm_is_little_endian, METH_VARARGS, + "is_little_endian() -> Return True if the VmMngr is Little Endian"}, {"get_memory_read",(PyCFunction)vm_get_memory_read, METH_VARARGS, "get_memory_read() -> Retrieve last instruction READ access\n" "This function is only valid in a memory breakpoint callback." diff --git a/test/test_all.py b/test/test_all.py index 6aa2a97e..259a1eaa 100755 --- a/test/test_all.py +++ b/test/test_all.py @@ -547,6 +547,8 @@ testset += ExampleDisasmFull(["x86_64", Example.get_sample("demo_x86_64.bin"), "0x401000"], depends=[test_x86_64]) testset += ExampleDisasmFull(["aarch64l", Example.get_sample("md5_aarch64l"), "0x400A00"], depends=[test_aarch64l]) +testset += ExampleDisasmFull(["ppc32b", Example.get_sample("md5_ppc32b"), + "0x1000087C"]) testset += ExampleDisasmFull(["x86_32", os.path.join("..", "..", "test", "arch", "x86", "qemu", "test-i386"), @@ -683,6 +685,9 @@ for script, dep in [(["x86_32.py", Example.get_sample("x86_32_sc.bin")], []), (["sandbox_elf_aarch64l.py", Example.get_sample("md5_aarch64l"), "--mimic-env"], []), + (["sandbox_elf_ppc32.py", + Example.get_sample("md5_ppc32b"), "-a", "0x1000087C"], + []), (["msp430.py", Example.get_sample("msp430_sc.bin"), "0"], [test_msp430]), (["mips32.py", Example.get_sample("mips32_sc_l.bin"), "0"], |