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-rw-r--r--miasm2/analysis/binary.py6
-rw-r--r--miasm2/analysis/disasm_cb.py6
-rw-r--r--miasm2/arch/aarch64/jit.py4
-rw-r--r--miasm2/arch/arm/jit.py4
-rw-r--r--miasm2/arch/mips32/jit.py4
-rw-r--r--miasm2/arch/msp430/jit.py2
-rw-r--r--miasm2/arch/x86/jit.py6
-rw-r--r--miasm2/core/asmbloc.py13
-rw-r--r--miasm2/core/parse_asm.py8
-rw-r--r--miasm2/ir/ir.py4
10 files changed, 32 insertions, 25 deletions
diff --git a/miasm2/analysis/binary.py b/miasm2/analysis/binary.py
index d47ca884..38a6be15 100644
--- a/miasm2/analysis/binary.py
+++ b/miasm2/analysis/binary.py
@@ -2,7 +2,7 @@ import logging
 
 from miasm2.core.bin_stream import bin_stream_str, bin_stream_elf, bin_stream_pe
 from miasm2.jitter.csts import PAGE_READ
-from miasm2.core.asmbloc import asm_symbol_pool
+from miasm2.core.asmbloc import AsmSymbolPool
 
 
 log = logging.getLogger("binary")
@@ -94,7 +94,7 @@ class Container(object):
         self._bin_stream = None
         self._entry_point = None
         self._arch = None
-        self._symbol_pool = asm_symbol_pool()
+        self._symbol_pool = AsmSymbolPool()
 
         # Launch parsing
         self.parse(*args, **kwargs)
@@ -121,7 +121,7 @@ class Container(object):
 
     @property
     def symbol_pool(self):
-        "asm_symbol_pool instance preloaded with container symbols (if any)"
+        "AsmSymbolPool instance preloaded with container symbols (if any)"
         return self._symbol_pool
 
 
diff --git a/miasm2/analysis/disasm_cb.py b/miasm2/analysis/disasm_cb.py
index 95a2b49b..4b88cad2 100644
--- a/miasm2/analysis/disasm_cb.py
+++ b/miasm2/analysis/disasm_cb.py
@@ -3,7 +3,7 @@
 from miasm2.expression.expression import ExprInt, ExprId, ExprMem, MatchExpr
 from miasm2.expression.simplifications import expr_simp
 from miasm2.core.asmbloc \
-    import asm_symbol_pool, asm_constraint_next, asm_constraint_to
+    import AsmSymbolPool, asm_constraint_next, asm_constraint_to
 from miasm2.core.utils import upck32
 # from miasm2.core.graph import DiGraph
 
@@ -25,7 +25,7 @@ def arm_guess_subcall(
     mnemo, attrib, pool_bin, cur_bloc, offsets_to_dis, symbol_pool):
     ira = get_ira(mnemo, attrib)
 
-    sp = asm_symbol_pool()
+    sp = AsmSymbolPool()
     ir_arch = ira(sp)
     print '###'
     print cur_bloc
@@ -74,7 +74,7 @@ def arm_guess_jump_table(
     jra = ExprId('jra')
     jrb = ExprId('jrb')
 
-    sp = asm_symbol_pool()
+    sp = AsmSymbolPool()
     ir_arch = ira(sp)
     ir_arch.add_bloc(cur_bloc)
 
diff --git a/miasm2/arch/aarch64/jit.py b/miasm2/arch/aarch64/jit.py
index cd41cca8..6910f5cf 100644
--- a/miasm2/arch/aarch64/jit.py
+++ b/miasm2/arch/aarch64/jit.py
@@ -15,7 +15,7 @@ class jitter_aarch64l(jitter):
     max_reg_arg = 8
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_aarch64l(sp), *args, **kwargs)
         self.vm.set_little_endian()
 
@@ -64,6 +64,6 @@ class jitter_aarch64l(jitter):
 class jitter_aarch64b(jitter_aarch64l):
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_aarch64b(sp), *args, **kwargs)
         self.vm.set_big_endian()
diff --git a/miasm2/arch/arm/jit.py b/miasm2/arch/arm/jit.py
index 9b5ddcbe..af657514 100644
--- a/miasm2/arch/arm/jit.py
+++ b/miasm2/arch/arm/jit.py
@@ -14,7 +14,7 @@ log.setLevel(logging.CRITICAL)
 class jitter_arml(jitter):
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_arml(sp), *args, **kwargs)
         self.vm.set_little_endian()
 
@@ -62,6 +62,6 @@ class jitter_arml(jitter):
 class jitter_armb(jitter_arml):
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_armb(sp), *args, **kwargs)
         self.vm.set_big_endian()
diff --git a/miasm2/arch/mips32/jit.py b/miasm2/arch/mips32/jit.py
index 439209eb..c979b90b 100644
--- a/miasm2/arch/mips32/jit.py
+++ b/miasm2/arch/mips32/jit.py
@@ -77,7 +77,7 @@ class jitter_mips32l(jitter):
     C_Gen = mipsCGen
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_mips32l(sp), *args, **kwargs)
         self.vm.set_little_endian()
 
@@ -101,6 +101,6 @@ class jitter_mips32l(jitter):
 class jitter_mips32b(jitter_mips32l):
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_mips32b(sp), *args, **kwargs)
         self.vm.set_big_endian()
diff --git a/miasm2/arch/msp430/jit.py b/miasm2/arch/msp430/jit.py
index 74efdb98..a78a619e 100644
--- a/miasm2/arch/msp430/jit.py
+++ b/miasm2/arch/msp430/jit.py
@@ -14,7 +14,7 @@ log.setLevel(logging.CRITICAL)
 class jitter_msp430(jitter):
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_msp430(sp), *args, **kwargs)
         self.vm.set_little_endian()
 
diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py
index d8a244b2..4861328b 100644
--- a/miasm2/arch/x86/jit.py
+++ b/miasm2/arch/x86/jit.py
@@ -37,7 +37,7 @@ class jitter_x86_16(jitter):
     C_Gen = x86_32_CGen
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_x86_16(sp), *args, **kwargs)
         self.vm.set_little_endian()
         self.ir_arch.do_stk_segm = False
@@ -69,7 +69,7 @@ class jitter_x86_32(jitter):
     C_Gen = x86_32_CGen
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_x86_32(sp), *args, **kwargs)
         self.vm.set_little_endian()
         self.ir_arch.do_stk_segm = False
@@ -129,7 +129,7 @@ class jitter_x86_64(jitter):
     C_Gen = x86_64_CGen
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.asm_symbol_pool()
+        sp = asmbloc.AsmSymbolPool()
         jitter.__init__(self, ir_x86_64(sp), *args, **kwargs)
         self.vm.set_little_endian()
         self.ir_arch.do_stk_segm = False
diff --git a/miasm2/core/asmbloc.py b/miasm2/core/asmbloc.py
index 97f94821..a76ec8a6 100644
--- a/miasm2/core/asmbloc.py
+++ b/miasm2/core/asmbloc.py
@@ -306,7 +306,7 @@ class asm_block_bad(AsmBlockBad):
         super(asm_block_bad, self).__init__(label, alignment, *args, **kwargs)
 
 
-class asm_symbol_pool:
+class AsmSymbolPool(object):
 
     def __init__(self):
         self._labels = []
@@ -430,6 +430,13 @@ class asm_symbol_pool:
         return label
 
 
+class asm_symbol_pool(AsmSymbolPool):
+
+    def __init__(self):
+        warnings.warn('DEPRECATION WARNING: use "AsmSymbolPool" instead of "asm_symbol_pool"')
+        super(asm_symbol_pool, self).__init__()
+
+
 class AsmCFG(DiGraph):
 
     """Directed graph standing for a ASM Control Flow Graph with:
@@ -758,7 +765,7 @@ class AsmCFG(DiGraph):
         In order to work, they must be only one block in @self per label in
         @symbol_pool (which is true if @self come from the same disasmEngine).
 
-        @symbol_pool: asm_symbol_pool instance associated with @self'labels
+        @symbol_pool: AsmSymbolPool instance associated with @self'labels
         @dis_block_callback: (optional) if set, this callback will be called on
         new block destinations
         @kwargs: (optional) named arguments to pass to dis_block_callback
@@ -1328,7 +1335,7 @@ class disasmEngine(object):
         self.arch = arch
         self.attrib = attrib
         self.bin_stream = bin_stream
-        self.symbol_pool = asm_symbol_pool()
+        self.symbol_pool = AsmSymbolPool()
         self.job_done = set()
 
         # Setup options
diff --git a/miasm2/core/parse_asm.py b/miasm2/core/parse_asm.py
index e51a2412..cda330fc 100644
--- a/miasm2/core/parse_asm.py
+++ b/miasm2/core/parse_asm.py
@@ -61,7 +61,7 @@ class DirectiveDontSplit(Directive):
 
 def guess_next_new_label(symbol_pool):
     """Generate a new label
-    @symbol_pool: the asm_symbol_pool instance"""
+    @symbol_pool: the AsmSymbolPool instance"""
     i = 0
     gen_name = "loc_%.8X"
     while True:
@@ -103,18 +103,18 @@ STATE_IN_BLOC = 1
 
 def parse_txt(mnemo, attrib, txt, symbol_pool=None):
     """Parse an assembly listing. Returns a couple (blocks, symbol_pool), where
-    blocks is a list of asm_bloc and symbol_pool the associated asm_symbol_pool
+    blocks is a list of asm_bloc and symbol_pool the associated AsmSymbolPool
 
     @mnemo: architecture used
     @attrib: architecture attribute
     @txt: assembly listing
-    @symbol_pool: (optional) the asm_symbol_pool instance used to handle labels
+    @symbol_pool: (optional) the AsmSymbolPool instance used to handle labels
     of the listing
 
     """
 
     if symbol_pool is None:
-        symbol_pool = asmbloc.asm_symbol_pool()
+        symbol_pool = asmbloc.AsmSymbolPool()
 
     C_NEXT = asmbloc.asm_constraint.c_next
     C_TO = asmbloc.asm_constraint.c_to
diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py
index 30c33b9c..1d7bb434 100644
--- a/miasm2/ir/ir.py
+++ b/miasm2/ir/ir.py
@@ -24,7 +24,7 @@ from itertools import chain
 import miasm2.expression.expression as m2_expr
 from miasm2.expression.expression_helper import get_missing_interval
 from miasm2.expression.simplifications import expr_simp
-from miasm2.core.asmbloc import asm_symbol_pool, expr_is_label, AsmLabel, \
+from miasm2.core.asmbloc import AsmSymbolPool, expr_is_label, AsmLabel, \
     AsmBlock
 from miasm2.core.graph import DiGraph
 
@@ -329,7 +329,7 @@ class IntermediateRepresentation(object):
 
     def __init__(self, arch, attrib, symbol_pool=None):
         if symbol_pool is None:
-            symbol_pool = asm_symbol_pool()
+            symbol_pool = AsmSymbolPool()
         self.symbol_pool = symbol_pool
         self.blocks = {}
         self.pc = arch.getpc(attrib)