diff options
| -rw-r--r-- | README.md | 2 | ||||
| -rw-r--r-- | miasm2/arch/arm/arch.py | 12 | ||||
| -rw-r--r-- | miasm2/arch/arm/sem.py | 26 | ||||
| -rw-r--r-- | miasm2/arch/msp430/ira.py | 12 | ||||
| -rw-r--r-- | miasm2/arch/msp430/sem.py | 252 | ||||
| -rw-r--r-- | miasm2/arch/x86/arch.py | 5 | ||||
| -rw-r--r-- | test/arch/arm/arch.py | 12 |
7 files changed, 214 insertions, 107 deletions
diff --git a/README.md b/README.md index 5ac830d5..e8e257c8 100644 --- a/README.md +++ b/README.md @@ -1,5 +1,5 @@ [](https://travis-ci.org/cea-sec/miasm) -[](https://ci.appveyor.com/project/serpilliere/miasm-6lfba/branch/master) +[](https://ci.appveyor.com/project/cea-sec/miasm) [](https://codeclimate.com/github/cea-sec/miasm) [](https://gitter.im/cea-sec/miasm?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge) Reverse engineering framework in Python diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py index d4b7d05a..b08d7940 100644 --- a/miasm2/arch/arm/arch.py +++ b/miasm2/arch/arm/arch.py @@ -2378,13 +2378,17 @@ armtop("svc", [bs('11011111'), imm8]) armtop("b", [bs('11100'), offs11]) armtop("und", [bs('1101'), bs('1110'), imm8_d1]) -armtop("rev", [bs('10111010'), bs('00'), rsl, rdl], [rdl, rsl]) +armtop("rev", [bs('10111010'), bs('00'), rsl, rdl], [rdl, rsl]) +armtop("rev16", [bs('10111010'), bs('01'), rsl, rdl], [rdl, rsl]) armtop("uxtb", [bs('10110010'), bs('11'), rml, rdl], [rdl, rml]) armtop("uxth", [bs('10110010'), bs('10'), rml, rdl], [rdl, rml]) armtop("sxtb", [bs('10110010'), bs('01'), rml, rdl], [rdl, rml]) armtop("sxth", [bs('10110010'), bs('00'), rml, rdl], [rdl, rml]) +armtop("uxtab", [bs('111110100'), bs('101'), rn_nopc, bs('1111'), rd, bs('10'), rot2, rm_rot2], [rd, rn_nopc, rm_rot2]) +armtop("uxtah", [bs('111110100'), bs('001'), rn_nopc, bs('1111'), rd, bs('10'), rot2, rm_rot2], [rd, rn_nopc, rm_rot2]) + # thumb2 ###################### # # ARM Architecture Reference Manual Thumb-2 Supplement @@ -2768,6 +2772,7 @@ imm5_2 = bs(l=2, fname="imm5_2") imm_stype = bs(l=2, fname="stype") imm_stype_00 = bs('00', fname="stype") +imm_stype_01 = bs('01', fname="stype") imm_stype_11 = bs('11', fname="stype") @@ -3207,6 +3212,7 @@ armtop("rsb", [bs('11101011110'), scc, rn, bs('0'), imm5_3, rd, imm5_2, imm_styp armtop("orn", [bs('11101010011'), scc, rn_nopc, bs('0'), imm5_3, rd, imm5_2, imm_stype, rm_sh], [rd, rn_nopc, rm_sh] ) # lsl armtop("mov", [bs('11101010010'), scc, bs('1111'), bs('0'), imm5_3, rd_nosppc, imm5_2, imm_stype_00, rm_sh], [rd_nosppc, rm_sh] ) +armtop("mov", [bs('11101010010'), scc, bs('1111'), bs('0'), imm5_3, rd_nosppc, imm5_2, imm_stype_01, rm_sh], [rd_nosppc, rm_sh] ) armtop("mov", [bs('11101010010'), scc, bs('1111'), bs('0'), imm5_3, rd_nosppc, imm5_2, imm_stype_11, rm_sh], [rd_nosppc, rm_sh] ) @@ -3219,6 +3225,8 @@ armtop("eor", [bs('11110'), imm12_1, bs('00100'), scc, rn, bs('0'), imm12_3, rd_ armtop("add", [bs('11110'), imm12_1, bs('10000'), scc, rn_nosppc, bs('0'), imm12_3, rd, imm12_8_t4], [rd, rn_nosppc, imm12_8_t4]) armtop("cmp", [bs('11110'), imm12_1, bs('01101'), bs('1'), rn, bs('0'), imm12_3, bs('1111'), imm12_8] ) +armtop("cmp", [bs('11101011101'), bs('1'), rn, bs('0'), imm5_3, bs('1111'), imm5_2, imm_stype, rm_sh], [rn, rm_sh] ) + armtop("mvn", [bs('11110'), imm12_1, bs('00011'), scc, bs('1111'), bs('0'), imm12_3, rd, imm12_8]) armtop("rsb", [bs('11110'), imm12_1, bs('01110'), scc, rn_nosppc, bs('0'), imm12_3, rd, imm12_8], [rd, rn_nosppc, imm12_8]) @@ -3277,3 +3285,5 @@ armtop("clz", [bs('111110101011'), rm, bs('1111'), rd, bs('1000'), rm_cp], [rd, armtop("tbb", [bs('111010001101'), rn_noarg, bs('11110000000'), bs('0'), bs_deref_reg_reg], [bs_deref_reg_reg]) armtop("tbh", [bs('111010001101'), rn_noarg, bs('11110000000'), bs('1'), bs_deref_reg_reg_lsl_1], [bs_deref_reg_reg_lsl_1]) armtop("dsb", [bs('111100111011'), bs('1111'), bs('1000'), bs('1111'), bs('0100'), barrier_option]) + +armtop("adr", [bs('11110'), imm12_1, bs('100000'), bs('1111'), bs('0'), imm12_3, rd, imm12_8_t4], [rd, imm12_8_t4]) diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py index 4af177d2..b5ab60d0 100644 --- a/miasm2/arch/arm/sem.py +++ b/miasm2/arch/arm/sem.py @@ -1089,7 +1089,7 @@ def cbnz(ir, instr, a, b): e = [] loc_next = ir.get_next_loc_key(instr) loc_next_expr = ExprLoc(loc_next, 32) - e.append(ir.IRDst, ExprCond(a, b, loc_next_expr)) + e.append(ExprAssign(ir.IRDst, ExprCond(a, b, loc_next_expr))) return e, [] @@ -1190,6 +1190,12 @@ def uxtab(ir, instr, a, b, c): return e, [] +def uxtah(ir, instr, a, b, c): + e = [] + e.append(ExprAssign(a, b + (c & ExprInt(0xffff, 32)))) + return e, [] + + def bkpt(ir, instr, a): e = [] e.append(ExprAssign(exception_flags, ExprInt(EXCEPT_SOFT_BP, 32))) @@ -1294,6 +1300,13 @@ def rev(ir, instr, a, b): return e, [] +def rev16(ir, instr, a, b): + e = [] + result = ExprCompose(b[8:16], b[:8], b[24:32], b[16:24]) + e.append(ExprAssign(a, result)) + return e, [] + + def nop(ir, instr): e = [] return e, [] @@ -1328,6 +1341,10 @@ def wfi(ir, instr): e = [] return e, [] +def adr(ir, instr, arg1, arg2): + e = [] + e.append(ExprAssign(arg1, (PC & ExprInt(0xfffffffc, 32)) + arg2)) + return e, [] COND_EQ = 0 COND_NE = 1 @@ -1494,8 +1511,10 @@ mnemo_condm0 = {'add': add, 'ubfx': ubfx, 'bfc': bfc, 'rev': rev, + 'rev16': rev16, 'clz': clz, 'uxtab': uxtab, + 'uxtah': uxtah, 'bkpt': bkpt, 'smulbb': smul, 'smulbt': smul, @@ -1579,6 +1598,7 @@ mnemo_nocond = {'lsr': lsr, 'cpsid': cpsid, 'wfe': wfe, 'wfi': wfi, + 'adr': adr, 'orn': orn, 'smlabb': smlabb, 'smlabt': smlabt, @@ -1706,7 +1726,7 @@ class ir_arml(IntermediateRepresentation): # Gen dummy irblock for IT instr loc_next = self.get_next_loc_key(instr) - dst = ExprAssign(self.IRDst, ExprId(loc_next, 32)) + dst = ExprAssign(self.IRDst, ExprLoc(loc_next, 32)) dst_blk = AssignBlock([dst], instr) assignments.append(dst_blk) irblock = IRBlock(loc, assignments) @@ -1743,7 +1763,7 @@ class ir_arml(IntermediateRepresentation): if split: raise NotImplementedError("Unsupported instr in IT block (%s)" % instr) - dst = ExprAssign(self.IRDst, ExprId(loc_next, 32)) + dst = ExprAssign(self.IRDst, ExprLoc(loc_next, 32)) dst_blk = AssignBlock([dst], instr) assignments.append(dst_blk) irblock = IRBlock(loc, assignments) diff --git a/miasm2/arch/msp430/ira.py b/miasm2/arch/msp430/ira.py index 2a850d82..5b19956e 100644 --- a/miasm2/arch/msp430/ira.py +++ b/miasm2/arch/msp430/ira.py @@ -2,7 +2,8 @@ from miasm2.ir.analysis import ira from miasm2.arch.msp430.sem import ir_msp430 - +from miasm2.ir.ir import AssignBlock +from miasm2.expression.expression import * class ir_a_msp430_base(ir_msp430, ira): @@ -10,6 +11,15 @@ class ir_a_msp430_base(ir_msp430, ira): ir_msp430.__init__(self, loc_db) self.ret_reg = self.arch.regs.R15 + def call_effects(self, addr, instr): + call_assignblk = AssignBlock( + [ + ExprAssign(self.ret_reg, ExprOp('call_func_ret', addr, self.sp, self.arch.regs.R15)), + ExprAssign(self.sp, ExprOp('call_func_stack', addr, self.sp)) + ], + instr + ) + return [call_assignblk], [] class ir_a_msp430(ir_a_msp430_base): diff --git a/miasm2/arch/msp430/sem.py b/miasm2/arch/msp430/sem.py index 4736a51c..e0110d24 100644 --- a/miasm2/arch/msp430/sem.py +++ b/miasm2/arch/msp430/sem.py @@ -27,45 +27,67 @@ def reset_sr_res(): return [ExprAssign(res, ExprInt(0, 7))] -def update_flag_zf(a): - return [ExprAssign(zf, ExprCond(a, ExprInt(0, zf.size), ExprInt(1, zf.size)))] +def update_flag_cf_inv_zf(a): + return [ExprAssign(cf, ExprCond(a, ExprInt(1, 1), ExprInt(0, 1)))] -def update_flag_nf(a): - return [ExprAssign(nf, a.msb())] +def update_flag_zf_eq(a, b): + return [ExprAssign(zf, ExprOp("FLAG_EQ_CMP", a, b))] -def update_flag_pf(a): - return [ExprAssign(pf, ExprOp('parity', a & ExprInt(0xFF, a.size)))] +def update_flag_zf(a): + return [ExprAssign(zf, ExprOp("FLAG_EQ", a))] -def update_flag_cf_inv_zf(a): - return [ExprAssign(cf, ExprCond(a, ExprInt(1, cf.size), ExprInt(0, cf.size)))] +def update_flag_nf(arg): + return [ + ExprAssign( + nf, + ExprOp("FLAG_SIGN_SUB", arg, ExprInt(0, arg.size)) + ) + ] -def update_flag_zn_r(a): - e = [] - e += update_flag_zf(a) - e += update_flag_nf(a) - e += reset_sr_res() - return e +def update_flag_add_cf(op1, op2, res): + "Compute cf in @res = @op1 + @op2" + return [ExprAssign(cf, ExprOp("FLAG_ADD_CF", op1, op2))] -def update_flag_sub_cf(a, b, c): - return [ExprAssign(cf, - ((((a ^ b) ^ c) ^ ((a ^ c) & (a ^ b))).msb()) ^ ExprInt(1, 1))] +def update_flag_add_of(op1, op2, res): + "Compute of in @res = @op1 + @op2" + return [ExprAssign(of, ExprOp("FLAG_ADD_OF", op1, op2))] -def update_flag_add_cf(a, b, c): - return [ExprAssign(cf, (((a ^ b) ^ c) ^ ((a ^ c) & (~(a ^ b)))).msb())] +# checked: ok for sbb add because b & c before +cf +def update_flag_sub_cf(op1, op2, res): + "Compote CF in @op1 - @op2" + return [ExprAssign(cf, ExprOp("FLAG_SUB_CF", op1, op2) ^ ExprInt(1, 1))] -def update_flag_add_of(a, b, c): - return [ExprAssign(of, (((a ^ c) & (~(a ^ b)))).msb())] +def update_flag_sub_of(op1, op2, res): + "Compote OF in @res = @op1 - @op2" + return [ExprAssign(of, ExprOp("FLAG_SUB_OF", op1, op2))] -def update_flag_sub_of(a, b, c): - return [ExprAssign(of, (((a ^ c) & (a ^ b))).msb())] +def update_flag_arith_sub_zn(arg1, arg2): + """ + Compute znp flags for (arg1 - arg2) + """ + e = [] + e += update_flag_zf_eq(arg1, arg2) + e += [ExprAssign(nf, ExprOp("FLAG_SIGN_SUB", arg1, arg2))] + return e + + +def update_flag_arith_add_zn(arg1, arg2): + """ + Compute zf and nf flags for (arg1 + arg2) + """ + e = [] + e += update_flag_zf_eq(arg1, -arg2) + e += [ExprAssign(nf, ExprOp("FLAG_SIGN_SUB", arg1, -arg2))] + return e + def mng_autoinc(a, b, size): @@ -103,22 +125,31 @@ def mov_w(ir, instr, a, b): def and_b(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 8) - c = a[:8] & b[:8] - e.append(ExprAssign(b, c.zeroExtend(16))) - e += update_flag_zn_r(c) - e += update_flag_cf_inv_zf(c) + e, arg1, arg2 = mng_autoinc(a, b, 8) + arg1, arg2 = arg1[:8], arg2[:8] + res = arg1 & arg2 + e.append(ExprAssign(b, res.zeroExtend(16))) + + e += [ExprAssign(zf, ExprOp('FLAG_EQ_AND', arg1, arg2))] + e += [ExprAssign(nf, ExprOp("FLAG_SIGN_SUB", res, ExprInt(0, res.size)))] + e += reset_sr_res() + e += update_flag_cf_inv_zf(res) e += [ExprAssign(of, ExprInt(0, 1))] + return e, [] def and_w(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 16) - c = a & b - e.append(ExprAssign(b, c)) - e += update_flag_zn_r(c) - e += update_flag_cf_inv_zf(c) + e, arg1, arg2 = mng_autoinc(a, b, 16) + res = arg1 & arg2 + e.append(ExprAssign(arg2, res)) + + e += [ExprAssign(zf, ExprOp('FLAG_EQ_AND', arg1, arg2))] + e += [ExprAssign(nf, ExprOp("FLAG_SIGN_SUB", res, ExprInt(0, res.size)))] + e += reset_sr_res() + e += update_flag_cf_inv_zf(res) e += [ExprAssign(of, ExprInt(0, 1))] + return e, [] @@ -132,6 +163,12 @@ def bic_b(ir, instr, a, b): def bic_w(ir, instr, a, b): e, a, b = mng_autoinc(a, b, 16) + if b == SR: + # Special case + if a.is_int(1): + # cf + e.append(ExprAssign(cf, ExprInt(0, 1))) + return e, [] c = (a ^ ExprInt(0xffff, 16)) & b e.append(ExprAssign(b, c)) return e, [] @@ -145,30 +182,29 @@ def bis_w(ir, instr, a, b): def bit_w(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 16) - c = a & b - e += update_flag_zn_r(c) - e += update_flag_cf_inv_zf(c) - e.append(ExprAssign(of, ExprInt(0, 1))) - return e, [] + e, arg1, arg2 = mng_autoinc(a, b, 16) + res = arg1 & arg2 -""" -def sub_b(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 8) - c = b - a - e.append(ExprAssign(b, c)) - e += update_flag_zn_r(c) - e += update_flag_sub_cf(b, a, c) - return None, e, [] -""" + e += [ExprAssign(zf, ExprOp('FLAG_EQ_AND', arg1, arg2))] + e += [ExprAssign(nf, ExprOp("FLAG_SIGN_SUB", res, ExprInt(0, res.size)))] + e += reset_sr_res() + e += update_flag_cf_inv_zf(res) + e += [ExprAssign(of, ExprInt(0, 1))] + + return e, [] def sub_w(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 16) - c = b - a - e.append(ExprAssign(b, c)) - e += update_flag_zn_r(c) - e += update_flag_sub_cf(b, a, c) + e, arg1, arg2 = mng_autoinc(a, b, 16) + res = arg2 - arg1 + + e.append(ExprAssign(b, res)) + + e += update_flag_arith_sub_zn(arg2, arg1) + e += update_flag_sub_cf(arg2, arg1, res) + e += update_flag_sub_of(arg2, arg1, res) + e += reset_sr_res() + # micrcorruption # e += update_flag_sub_of(a, b, c) # e += update_flag_sub_of(b, a, c) @@ -176,27 +212,33 @@ def sub_w(ir, instr, a, b): def add_b(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 8) - if isinstance(b, ExprMem): - b = ExprMem(b.arg, 8) + e, arg1, arg2 = mng_autoinc(a, b, 8) + if isinstance(arg2, ExprMem): + arg2 = ExprMem(arg2.arg, 8) else: - b = b[:8] - a = a[:8] - c = b + a - e.append(ExprAssign(b, c)) - e += update_flag_zn_r(c) - e += update_flag_add_cf(a, b, c) - e += update_flag_add_of(a, b, c) + arg2 = arg2[:8] + arg1 = arg1[:8] + res = arg2 + arg1 + e.append(ExprAssign(b, res)) + + e += update_flag_arith_add_zn(arg2, arg1) + e += update_flag_add_cf(arg2, arg1, res) + e += update_flag_add_of(arg2, arg1, res) + e += reset_sr_res() + return e, [] def add_w(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 16) - c = b + a - e.append(ExprAssign(b, c)) - e += update_flag_zn_r(c) - e += update_flag_add_cf(a, b, c) - e += update_flag_add_of(a, b, c) + e, arg1, arg2 = mng_autoinc(a, b, 16) + res = arg2 + arg1 + e.append(ExprAssign(b, res)) + + e += update_flag_arith_add_zn(arg2, arg1) + e += update_flag_add_cf(arg2, arg1, res) + e += update_flag_add_of(arg2, arg1, res) + e += reset_sr_res() + return e, [] @@ -206,7 +248,6 @@ def dadd_w(ir, instr, a, b): c = ExprOp("bcdadd", b, a) # +zeroExtend(cf, 16)) e.append(ExprAssign(b, c)) - # e += update_flag_zn_r(c) # micrcorruption e += update_flag_zf(a) @@ -220,12 +261,16 @@ def dadd_w(ir, instr, a, b): def xor_w(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 16) - c = b ^ a - e.append(ExprAssign(b, c)) - e += update_flag_zn_r(c) + e, arg1, arg2 = mng_autoinc(a, b, 16) + res = arg2 ^ arg1 + e.append(ExprAssign(b, res)) + + e += [ExprAssign(zf, ExprOp('FLAG_EQ_CMP', arg2, arg1))] + e += update_flag_nf(res) + e += reset_sr_res() e += update_flag_cf_inv_zf(c) - e.append(ExprAssign(of, b.msb() & a.msb())) + e.append(ExprAssign(of, arg2.msb() & arg1.msb())) + return e, [] @@ -257,20 +302,27 @@ def swpb(ir, instr, a): def cmp_w(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 16) - c = b - a - e += update_flag_zn_r(c) - e += update_flag_sub_cf(b, a, c) - e += update_flag_sub_of(b, a, c) + e, arg1, arg2 = mng_autoinc(a, b, 16) + res = arg2 - arg1 + + e += update_flag_arith_sub_zn(arg2, arg1) + e += update_flag_sub_cf(arg2, arg1, res) + e += update_flag_sub_of(arg2, arg1, res) + e += reset_sr_res() + return e, [] def cmp_b(ir, instr, a, b): - e, a, b = mng_autoinc(a, b, 8) - c = b[:8] - a[:8] - e += update_flag_zn_r(c) - e += update_flag_sub_cf(b[:8], a[:8], c) - e += update_flag_sub_of(b[:8], a[:8], c) + e, arg1, arg2 = mng_autoinc(a, b, 8) + arg1, arg2 = arg1[:8], arg2[:8] + res = arg2 - arg1 + + e += update_flag_arith_sub_zn(arg2, arg1) + e += update_flag_sub_cf(arg2, arg1, res) + e += update_flag_sub_of(arg2, arg1, res) + e += reset_sr_res() + return e, [] @@ -278,8 +330,8 @@ def jz(ir, instr, a): loc_next = ir.get_next_loc_key(instr) loc_next_expr = ExprLoc(loc_next, 16) e = [] - e.append(ExprAssign(PC, ExprCond(zf, a, loc_next_expr))) - e.append(ExprAssign(ir.IRDst, ExprCond(zf, a, loc_next_expr))) + e.append(ExprAssign(PC, ExprCond(ExprOp("CC_EQ", zf), a, loc_next_expr))) + e.append(ExprAssign(ir.IRDst, ExprCond(ExprOp("CC_EQ", zf), a, loc_next_expr))) return e, [] @@ -287,8 +339,8 @@ def jnz(ir, instr, a): loc_next = ir.get_next_loc_key(instr) loc_next_expr = ExprLoc(loc_next, 16) e = [] - e.append(ExprAssign(PC, ExprCond(zf, loc_next_expr, a))) - e.append(ExprAssign(ir.IRDst, ExprCond(zf, loc_next_expr, a))) + e.append(ExprAssign(PC, ExprCond(ExprOp("CC_EQ", zf), loc_next_expr, a))) + e.append(ExprAssign(ir.IRDst, ExprCond(ExprOp("CC_EQ", zf), loc_next_expr, a))) return e, [] @@ -296,8 +348,8 @@ def jl(ir, instr, a): loc_next = ir.get_next_loc_key(instr) loc_next_expr = ExprLoc(loc_next, 16) e = [] - e.append(ExprAssign(PC, ExprCond(nf ^ of, a, loc_next_expr))) - e.append(ExprAssign(ir.IRDst, ExprCond(nf ^ of, a, loc_next_expr))) + e.append(ExprAssign(PC, ExprCond(ExprOp("CC_S<", nf, of), a, loc_next_expr))) + e.append(ExprAssign(ir.IRDst, ExprCond(ExprOp("CC_S<", nf, of), a, loc_next_expr))) return e, [] @@ -305,8 +357,8 @@ def jc(ir, instr, a): loc_next = ir.get_next_loc_key(instr) loc_next_expr = ExprLoc(loc_next, 16) e = [] - e.append(ExprAssign(PC, ExprCond(cf, a, loc_next_expr))) - e.append(ExprAssign(ir.IRDst, ExprCond(cf, a, loc_next_expr))) + e.append(ExprAssign(PC, ExprCond(ExprOp("CC_U>=", cf ^ ExprInt(1, 1)), a, loc_next_expr))) + e.append(ExprAssign(ir.IRDst, ExprCond(ExprOp("CC_U>=", cf ^ ExprInt(1, 1)), a, loc_next_expr))) return e, [] @@ -314,8 +366,8 @@ def jnc(ir, instr, a): loc_next = ir.get_next_loc_key(instr) loc_next_expr = ExprLoc(loc_next, 16) e = [] - e.append(ExprAssign(PC, ExprCond(cf, loc_next_expr, a))) - e.append(ExprAssign(ir.IRDst, ExprCond(cf, loc_next_expr, a))) + e.append(ExprAssign(PC, ExprCond(ExprOp("CC_U>=", cf ^ ExprInt(1, 1)), loc_next_expr, a))) + e.append(ExprAssign(ir.IRDst, ExprCond(ExprOp("CC_U>=", cf ^ ExprInt(1, 1)), loc_next_expr, a))) return e, [] @@ -323,8 +375,8 @@ def jge(ir, instr, a): loc_next = ir.get_next_loc_key(instr) loc_next_expr = ExprLoc(loc_next, 16) e = [] - e.append(ExprAssign(PC, ExprCond(nf ^ of, loc_next_expr, a))) - e.append(ExprAssign(ir.IRDst, ExprCond(nf ^ of, loc_next_expr, a))) + e.append(ExprAssign(PC, ExprCond(ExprOp("CC_S>=", nf, of), a, loc_next_expr))) + e.append(ExprAssign(ir.IRDst, ExprCond(ExprOp("CC_S>=", nf, of), a, loc_next_expr))) return e, [] @@ -340,7 +392,6 @@ def rrc_w(ir, instr, a): c = ExprCompose(a[1:16], cf) e.append(ExprAssign(a, c)) e.append(ExprAssign(cf, a[:1])) - # e += update_flag_zn_r(c) # micrcorruption e += update_flag_zf(a) @@ -357,7 +408,6 @@ def rra_w(ir, instr, a): e.append(ExprAssign(a, c)) # TODO: error in disasm microcorruption? # e.append(ExprAssign(cf, a[:1])) - # e += update_flag_zn_r(c) # micrcorruption e += update_flag_zf(a) @@ -373,7 +423,9 @@ def sxt(ir, instr, a): c = a[:8].signExtend(16) e.append(ExprAssign(a, c)) - e += update_flag_zn_r(c) + e += update_flag_zf(a) + e += update_flag_nf(a) + e += reset_sr_res() e += update_flag_cf_inv_zf(c) e.append(ExprAssign(of, ExprInt(0, 1))) diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py index 77744ccd..11c1e00f 100644 --- a/miasm2/arch/x86/arch.py +++ b/miasm2/arch/x86/arch.py @@ -540,7 +540,10 @@ class instruction_x86(instruction): self.additional_info.prefixed = getattr(c, "prefixed", "") def __str__(self): - o = super(instruction_x86, self).__str__() + return self.to_string() + + def to_string(self, loc_db=None): + o = super(instruction_x86, self).to_string(loc_db) if self.additional_info.g1.value & 1: o = "LOCK %s" % o if self.additional_info.g1.value & 2: diff --git a/test/arch/arm/arch.py b/test/arch/arm/arch.py index 2110ccf7..c7d2961d 100644 --- a/test/arch/arm/arch.py +++ b/test/arch/arm/arch.py @@ -449,6 +449,13 @@ reg_tests_armt = [ ("00000000 UXTB R5, R0", "C5B2"), + + ("00000000 UXTAB R7, R0, R1", + "50FA81F7"), + + ("00000000 UXTAH R4, R0, R1", + "10FA81F4"), + ("xxxxxxxx BKPT 0x13", "13be"), ("xxxxxxxx SVC 0x13", @@ -493,6 +500,8 @@ reg_tests_armt = [ ("xxxxxxxx MOV R1, R1 LSL 0x10", "4FEA0141"), + ("xxxxxxxx MOV R2, R11 LSR 0x1", + "4FEA5B02"), ("xxxxxxxx ADD R1, R4, 0x30", "04F13001"), @@ -676,6 +685,9 @@ reg_tests_armt = [ ("xxxxxxxx DSB SY", "bff34f8f"), + ("xxxxxxxx CMP R5, R0 LSR 0x8", + "B5EB102F"), + ] print "#" * 40, 'armthumb', '#' * 40 |