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-rw-r--r--example/asm/shellcode.py10
-rw-r--r--example/samples/armt.S2
-rw-r--r--miasm2/arch/arm/arch.py12
-rw-r--r--miasm2/arch/msp430/arch.py3
-rw-r--r--miasm2/arch/x86/arch.py8
-rw-r--r--miasm2/core/cpu.py10
6 files changed, 28 insertions, 17 deletions
diff --git a/example/asm/shellcode.py b/example/asm/shellcode.py
index 3b22e801..3f3aa877 100644
--- a/example/asm/shellcode.py
+++ b/example/asm/shellcode.py
@@ -9,6 +9,7 @@ from miasm2.core.cpu import parse_ast
 from miasm2.core import parse_asm, asmbloc
 import miasm2.expression.expression as m2_expr
 from miasm2.analysis.machine import Machine
+from miasm2.core.interval import interval
 
 parser = ArgumentParser("Multi-arch (32 bits) assembler")
 parser.add_argument('architecture', help="architecture: " + \
@@ -34,6 +35,7 @@ except ValueError:
     size = 32
 reg_and_id = dict(machine.mn.regs.all_regs_ids_byname)
 base_expr = machine.base_expr
+dst_interval = None
 
 # Output format
 if args.PE:
@@ -50,7 +52,8 @@ if args.PE:
     addr_main = pe.rva2virt(s_text.addr)
     virt = pe.virt
     output = pe
-
+    dst_interval = interval([(pe.rva2virt(s_text.addr),
+                              pe.rva2virt(s_text.addr + s_text.size))])
 else:
     st = StrPatchwork()
 
@@ -79,7 +82,10 @@ graph = asmbloc.bloc2graph(blocs[0])
 open("graph.txt", "w").write(graph)
 
 # Apply patches
-patches = asmbloc.asm_resolve_final(machine.mn, blocs[0], symbol_pool)
+patches = asmbloc.asm_resolve_final(machine.mn,
+                                    blocs[0],
+                                    symbol_pool,
+                                    dst_interval)
 if args.encrypt:
     # Encrypt code
     ad_start = symbol_pool.getby_name_create(args.encrypt[0]).offset
diff --git a/example/samples/armt.S b/example/samples/armt.S
index c50075a6..c833c961 100644
--- a/example/samples/armt.S
+++ b/example/samples/armt.S
@@ -15,7 +15,7 @@ main:
      PUSH    {LR}
      SUB     SP, 0x100
      MOV     R0, SP
-     ADD     R1, PC, mystr-$+6
+     ADD     R1, PC, mystr-$
      MOV     R0, R0
      EORS    R2, R2
      ADDS    R2, R2, 0x4
diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py
index 87af007a..4ecfbd97 100644
--- a/miasm2/arch/arm/arch.py
+++ b/miasm2/arch/arm/arch.py
@@ -485,6 +485,10 @@ class instruction_armt(instruction_arm):
             raise ValueError('strange offset! %r' % off)
         self.args[0] = ExprInt32(off)
 
+    def get_asm_offset(self, x):
+        # ADR XXX, PC, imm => PC is 4 aligned + imm
+        new_offset = ((self.offset+self.l)/4)*4
+        return ExprInt_from(x, new_offset)
 
 
 class mn_arm(cls_mn):
@@ -501,6 +505,7 @@ class mn_arm(cls_mn):
     sp = {'l':SP, 'b':SP}
     instruction = instruction_arm
     max_instruction_len = 4
+    alignment = 4
 
     @classmethod
     def getpc(cls, attrib = None):
@@ -599,7 +604,8 @@ class mn_armt(cls_mn):
     pc = PC
     sp = SP
     instruction = instruction_armt
-    max_instruction_len = 8
+    max_instruction_len = 4
+    alignment = 4
 
     @classmethod
     def getpc(cls, attrib = None):
@@ -784,7 +790,9 @@ class arm_offs(arm_imm):
         return v << 2
 
     def encodeval(self, v):
-        return v >> 2
+        if v%4 == 0:
+            return v >> 2
+        return False
 
     def decode(self, v):
         v = v & self.lmask
diff --git a/miasm2/arch/msp430/arch.py b/miasm2/arch/msp430/arch.py
index 6c622ce7..07a11ae8 100644
--- a/miasm2/arch/msp430/arch.py
+++ b/miasm2/arch/msp430/arch.py
@@ -188,8 +188,7 @@ class instruction_msp430(instruction):
             # raise ValueError('dst must be int or label')
             log.warning('dynamic dst %r', e)
             return
-        # return ExprInt32(e.arg - (self.offset + self.l))
-        self.args[0] = ExprInt_fromsize(16, e.arg - (self.offset + self.l))
+        self.args[0] = ExprInt_fromsize(16, (e.arg - (self.offset + self.l))/2)
 
     def get_info(self, c):
         pass
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py
index ef6a6fb9..3b714f79 100644
--- a/miasm2/arch/x86/arch.py
+++ b/miasm2/arch/x86/arch.py
@@ -488,12 +488,8 @@ class instruction_x86(instruction):
             return
         e = self.args[0]
         if isinstance(e, ExprId):
-            if isinstance(e.name, asm_label):
-                pass
-            elif not e.name in all_regs_ids_byname:
-                l = symbol_pool.getby_name_create(e.name)
-                s = ExprId(l, e.size)
-                self.args[0] = s
+            if not isinstance(e.name, asm_label) and e not in all_regs_ids:
+                raise ValueError("ExprId must be a label or a register")
         elif isinstance(e, ExprInt):
             ad = e.arg + int(self.offset) + self.l
             l = symbol_pool.getby_offset_create(ad)
diff --git a/miasm2/core/cpu.py b/miasm2/core/cpu.py
index bde95200..faba895a 100644
--- a/miasm2/core/cpu.py
+++ b/miasm2/core/cpu.py
@@ -947,14 +947,14 @@ class instruction(object):
             for x in ids:
                 if isinstance(x.name, asmbloc.asm_label):
                     name = x.name.name
+                    # special symbol $
+                    if name == '$':
+                        fixed_ids[x] = self.get_asm_offset(x)
+                        continue
                     if not name in symbols:
                         raise ValueError('unresolved symbol! %r' % x)
                 else:
                     name = x.name
-                # special symbol
-                if name == '$':
-                    fixed_ids[x] = self.get_asm_offset(x)
-                    continue
                 if not name in symbols:
                     continue
                 if symbols[name].offset is None:
@@ -981,6 +981,8 @@ class cls_mn(object):
     __metaclass__ = metamn
     args_symb = []
     instruction = instruction
+    # Block's offset alignement
+    alignment = 1
 
     @classmethod
     def guess_mnemo(cls, bs, attrib, pre_dis_info, offset):