diff options
| -rw-r--r-- | miasm2/arch/x86/arch.py | 3 | ||||
| -rw-r--r-- | miasm2/arch/x86/sem.py | 8 | ||||
| -rw-r--r-- | test/arch/x86/arch.py | 5 |
3 files changed, 16 insertions, 0 deletions
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py index ee4f5fbf..efa955f3 100644 --- a/miasm2/arch/x86/arch.py +++ b/miasm2/arch/x86/arch.py @@ -3943,6 +3943,9 @@ addop("xorpd", [bs8(0x0f), bs8(0x57), pref_66] + rmmod(xmm_reg, rm_arg_xmm)) addop("andps", [bs8(0x0f), bs8(0x54), no_xmm_pref] + rmmod(xmm_reg, rm_arg_xmm)) addop("andpd", [bs8(0x0f), bs8(0x54), pref_66] + rmmod(xmm_reg, rm_arg_xmm)) +addop("andnps", [bs8(0x0f), bs8(0x55), no_xmm_pref] + rmmod(xmm_reg, rm_arg_xmm)) +addop("andnpd", [bs8(0x0f), bs8(0x55), pref_66] + rmmod(xmm_reg, rm_arg_xmm)) + ## OR addop("orps", [bs8(0x0f), bs8(0x56), no_xmm_pref] + rmmod(xmm_reg, rm_arg_xmm)) addop("orpd", [bs8(0x0f), bs8(0x56), pref_66] + rmmod(xmm_reg, rm_arg_xmm)) diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index 61e56bbe..a9737923 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -3149,6 +3149,12 @@ def andps(ir, instr, a, b): return e, [] +def andnps(ir, instr, a, b): + e = [] + e.append(m2_expr.ExprAff(a, m2_expr.ExprOp('&', a ^ a.mask, b))) + return e, [] + + def orps(ir, instr, a, b): e = [] e.append(m2_expr.ExprAff(a, m2_expr.ExprOp('|', a, b))) @@ -4254,6 +4260,8 @@ mnemo_func = {'mov': mov, "movups": movapd, # XXX TODO alignement check "andps": andps, "andpd": andps, + "andnps": andnps, + "andnpd": andnps, "orps": orps, "orpd": orps, "xorps": xorps, diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py index 3fe33ac8..9fe718cc 100644 --- a/test/arch/x86/arch.py +++ b/test/arch/x86/arch.py @@ -2314,6 +2314,11 @@ reg_tests = [ "0f548327bd2c00"), (m32, "00000000 ANDPD XMM0, XMMWORD PTR [EBX+0x2CBD27]", "660f548327bd2c00"), + (m32, "00000000 ANDNPS XMM0, XMMWORD PTR [EBX+0x2CBD27]", + "0f558327bd2c00"), + (m32, "00000000 ANDNPD XMM0, XMMWORD PTR [EBX+0x2CBD27]", + "660f558327bd2c00"), + (m32, "00000000 SUBSD XMM1, XMM0", "f20f5cc8"), |