diff options
Diffstat (limited to 'miasm2/arch/aarch64')
| -rw-r--r-- | miasm2/arch/aarch64/arch.py | 32 | ||||
| -rw-r--r-- | miasm2/arch/aarch64/ira.py | 16 | ||||
| -rw-r--r-- | miasm2/arch/aarch64/jit.py | 8 | ||||
| -rw-r--r-- | miasm2/arch/aarch64/sem.py | 8 |
4 files changed, 31 insertions, 33 deletions
diff --git a/miasm2/arch/aarch64/arch.py b/miasm2/arch/aarch64/arch.py index a57e585f..79b76743 100644 --- a/miasm2/arch/aarch64/arch.py +++ b/miasm2/arch/aarch64/arch.py @@ -263,7 +263,7 @@ conds_inv_expr, _, conds_inv_info = gen_regs(CONDS_INV, {}) class aarch64_arg(m_arg): - def asm_ast_to_expr(self, value, symbol_pool, size_hint=None, fixed_size=None): + def asm_ast_to_expr(self, value, loc_db, size_hint=None, fixed_size=None): if size_hint is None: size_hint = 64 if fixed_size is None: @@ -276,25 +276,25 @@ class aarch64_arg(m_arg): if isinstance(value.name, ExprId): fixed_size.add(value.name.size) return value.name - loc_key = symbol_pool.getby_name_create(value.name) + loc_key = loc_db.getby_name_create(value.name) return ExprLoc(loc_key, size_hint) if isinstance(value, AstInt): assert size_hint is not None return ExprInt(value.value, size_hint) if isinstance(value, AstOp): if value.op == "segm": - segm = self.asm_ast_to_expr(value.args[0], symbol_pool) - ptr = self.asm_ast_to_expr(value.args[1], symbol_pool, None, fixed_size) + segm = self.asm_ast_to_expr(value.args[0], loc_db) + ptr = self.asm_ast_to_expr(value.args[1], loc_db, None, fixed_size) return ExprOp('segm', segm, ptr) - args = [self.asm_ast_to_expr(arg, symbol_pool, None, fixed_size) for arg in value.args] + args = [self.asm_ast_to_expr(arg, loc_db, None, fixed_size) for arg in value.args] if len(fixed_size) == 0: # No fixed size pass elif len(fixed_size) == 1: # One fixed size, regen all size = list(fixed_size)[0] - args = [self.asm_ast_to_expr(arg, symbol_pool, size, fixed_size) for arg in value.args] + args = [self.asm_ast_to_expr(arg, loc_db, size, fixed_size) for arg in value.args] else: raise ValueError("Size conflict") @@ -310,13 +310,13 @@ class instruction_aarch64(instruction): super(instruction_aarch64, self).__init__(*args, **kargs) @staticmethod - def arg2str(expr, index=None, symbol_pool=None): + def arg2str(expr, index=None, loc_db=None): wb = False if expr.is_id() or expr.is_int(): return str(expr) elif expr.is_loc(): - if symbol_pool is not None: - return symbol_pool.str_loc_key(expr.loc_key) + if loc_db is not None: + return loc_db.str_loc_key(expr.loc_key) else: return str(expr) elif isinstance(expr, m2_expr.ExprOp) and expr.op in shift_expr: @@ -368,13 +368,13 @@ class instruction_aarch64(instruction): else: return 0 - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): index = self.mnemo_flow_to_dst_index(self.name) expr = self.args[index] if not expr.is_int(): return addr = expr.arg + self.offset - loc_key = symbol_pool.getby_offset_create(addr) + loc_key = loc_db.getby_offset_create(addr) self.args[index] = m2_expr.ExprLoc(loc_key, expr.size) def breakflow(self): @@ -383,14 +383,14 @@ class instruction_aarch64(instruction): def is_subcall(self): return self.name in ["BLR", "BL"] - def getdstflow(self, symbol_pool): + def getdstflow(self, loc_db): index = self.mnemo_flow_to_dst_index(self.name) return [self.args[index]] def splitflow(self): return self.name in BRCOND + ["BLR", "BL"] - def get_symbol_size(self, symbol, symbol_pool): + def get_symbol_size(self, symbol, loc_db): return 64 def fixDstOffset(self): @@ -502,7 +502,7 @@ class mn_aarch64(cls_mn): else: raise NotImplementedError('bad attrib') - def get_symbol_size(self, symbol, symbol_pool, mode): + def get_symbol_size(self, symbol, loc_db, mode): return 32 def reset_class(self): @@ -800,8 +800,8 @@ def set_imm_to_size(size, expr): class aarch64_imm_sf(imm_noarg): parser = base_expr - def fromstring(self, text, symbol_pool, parser_result=None): - start, stop = super(aarch64_imm_sf, self).fromstring(text, symbol_pool, parser_result) + def fromstring(self, text, loc_db, parser_result=None): + start, stop = super(aarch64_imm_sf, self).fromstring(text, loc_db, parser_result) if start is None: return start, stop size = self.parent.args[0].expr.size diff --git a/miasm2/arch/aarch64/ira.py b/miasm2/arch/aarch64/ira.py index 5a89e910..a895b549 100644 --- a/miasm2/arch/aarch64/ira.py +++ b/miasm2/arch/aarch64/ira.py @@ -6,22 +6,22 @@ from miasm2.arch.aarch64.sem import ir_aarch64l, ir_aarch64b class ir_a_aarch64l_base(ir_aarch64l, ira): - def __init__(self, symbol_pool=None): - ir_aarch64l.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_aarch64l.__init__(self, loc_db) self.ret_reg = self.arch.regs.X0 class ir_a_aarch64b_base(ir_aarch64b, ira): - def __init__(self, symbol_pool=None): - ir_aarch64b.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_aarch64b.__init__(self, loc_db) self.ret_reg = self.arch.regs.X0 class ir_a_aarch64l(ir_a_aarch64l_base): - def __init__(self, symbol_pool=None): - ir_a_aarch64l_base.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_a_aarch64l_base.__init__(self, loc_db) self.ret_reg = self.arch.regs.X0 def get_out_regs(self, _): @@ -45,6 +45,6 @@ class ir_a_aarch64l(ir_a_aarch64l_base): class ir_a_aarch64b(ir_a_aarch64b_base, ir_a_aarch64l): - def __init__(self, symbol_pool=None): - ir_a_aarch64b_base.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_a_aarch64b_base.__init__(self, loc_db) self.ret_reg = self.arch.regs.X0 diff --git a/miasm2/arch/aarch64/jit.py b/miasm2/arch/aarch64/jit.py index b557a179..91c32c68 100644 --- a/miasm2/arch/aarch64/jit.py +++ b/miasm2/arch/aarch64/jit.py @@ -1,7 +1,7 @@ import logging from miasm2.jitter.jitload import Jitter, named_arguments -from miasm2.core import asmblock +from miasm2.core.locationdb import LocationDB from miasm2.core.utils import pck64, upck64 from miasm2.arch.aarch64.sem import ir_aarch64b, ir_aarch64l @@ -15,8 +15,7 @@ class jitter_aarch64l(Jitter): max_reg_arg = 8 def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() - Jitter.__init__(self, ir_aarch64l(sp), *args, **kwargs) + Jitter.__init__(self, ir_aarch64l(LocationDB()), *args, **kwargs) self.vm.set_little_endian() def push_uint64_t(self, value): @@ -76,6 +75,5 @@ class jitter_aarch64l(Jitter): class jitter_aarch64b(jitter_aarch64l): def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() - Jitter.__init__(self, ir_aarch64b(sp), *args, **kwargs) + Jitter.__init__(self, ir_aarch64b(LocationDB()), *args, **kwargs) self.vm.set_big_endian() diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py index c232e8dc..a17c0f14 100644 --- a/miasm2/arch/aarch64/sem.py +++ b/miasm2/arch/aarch64/sem.py @@ -861,8 +861,8 @@ class aarch64info: class ir_aarch64l(IntermediateRepresentation): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_aarch64, "l", symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_aarch64, "l", loc_db) self.pc = PC self.sp = SP self.IRDst = m2_expr.ExprId('IRDst', 64) @@ -945,8 +945,8 @@ class ir_aarch64l(IntermediateRepresentation): class ir_aarch64b(ir_aarch64l): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_aarch64, "b", symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_aarch64, "b", loc_db) self.pc = PC self.sp = SP self.IRDst = m2_expr.ExprId('IRDst', 64) |