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-rw-r--r--miasm2/arch/arm/jit.py23
1 files changed, 11 insertions, 12 deletions
diff --git a/miasm2/arch/arm/jit.py b/miasm2/arch/arm/jit.py
index 70d16176..9b5ddcbe 100644
--- a/miasm2/arch/arm/jit.py
+++ b/miasm2/arch/arm/jit.py
@@ -2,7 +2,7 @@ import logging
 
 from miasm2.jitter.jitload import jitter, named_arguments
 from miasm2.core import asmbloc
-from miasm2.core.utils import *
+from miasm2.core.utils import pck32, upck32
 from miasm2.arch.arm.sem import ir_armb, ir_arml
 
 log = logging.getLogger('jit_arm')
@@ -18,18 +18,17 @@ class jitter_arml(jitter):
         jitter.__init__(self, ir_arml(sp), *args, **kwargs)
         self.vm.set_little_endian()
 
-    def push_uint32_t(self, v):
+    def push_uint32_t(self, value):
         self.cpu.SP -= 4
-        self.vm.set_mem(self.cpu.SP, pck32(v))
+        self.vm.set_mem(self.cpu.SP, pck32(value))
 
     def pop_uint32_t(self):
-        x = upck32(self.vm.get_mem(self.cpu.SP, 4))
+        value = upck32(self.vm.get_mem(self.cpu.SP, 4))
         self.cpu.SP += 4
-        return x
+        return value
 
-    def get_stack_arg(self, n):
-        x = upck32(self.vm.get_mem(self.cpu.SP + 4 * n, 4))
-        return x
+    def get_stack_arg(self, index):
+        return upck32(self.vm.get_mem(self.cpu.SP + 4 * index, 4))
 
     # calling conventions
 
@@ -49,11 +48,11 @@ class jitter_arml(jitter):
             self.cpu.R0 = ret_value
         return True
 
-    def get_arg_n_stdcall(self, n):
-        if n < 4:
-            arg = self.cpu.get_gpreg()['R%d' % n]
+    def get_arg_n_stdcall(self, index):
+        if index < 4:
+            arg = self.cpu.get_gpreg()['R%d' % index]
         else:
-            arg = self.get_stack_arg(n-4)
+            arg = self.get_stack_arg(index-4)
         return arg
 
     def init_run(self, *args, **kwargs):