diff options
Diffstat (limited to '')
| -rw-r--r-- | miasm2/arch/arm/arch.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/arm/sem.py | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py index 5fbaa946..d4b7d05a 100644 --- a/miasm2/arch/arm/arch.py +++ b/miasm2/arch/arm/arch.py @@ -608,7 +608,7 @@ class mn_arm(cls_mn): return 0 o = 0 if n > bs.getlen() * 8: - raise ValueError('not enought bits %r %r' % (n, len(bs.bin) * 8)) + raise ValueError('not enough bits %r %r' % (n, len(bs.bin) * 8)) while n: offset = start / 8 n_offset = cls.endian_offset(attrib, offset) @@ -709,7 +709,7 @@ class mn_armt(cls_mn): return 0 o = 0 if n > bs.getlen() * 8: - raise ValueError('not enought bits %r %r' % (n, len(bs.bin) * 8)) + raise ValueError('not enough bits %r %r' % (n, len(bs.bin) * 8)) while n: offset = start / 8 n_offset = cls.endian_offset(attrib, offset) diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py index ac1d9ce9..4af177d2 100644 --- a/miasm2/arch/arm/sem.py +++ b/miasm2/arch/arm/sem.py @@ -778,7 +778,7 @@ def st_ld_r(ir, instr, a, a2, b, store=False, size=32, s_ext=False, z_ext=False) else: ad = base + off - # PC base lookup uses PC 4 byte alignemnt + # PC base lookup uses PC 4 byte alignment ad = ad.replace_expr({PC: PC & ExprInt(0xFFFFFFFC, 32)}) dmem = False @@ -1700,7 +1700,7 @@ class ir_arml(IntermediateRepresentation): cond_eq = tab_cond[cond_num] if not index + len(it_hints) <= len(block.lines): - raise NotImplementedError("Splitted IT block non supported yet") + raise NotImplementedError("Split IT block non supported yet") ir_blocks_all = [] |