diff options
Diffstat (limited to 'miasm2/arch/arm')
| -rw-r--r-- | miasm2/arch/arm/ira.py | 2 | ||||
| -rw-r--r-- | miasm2/arch/arm/sem.py | 14 |
2 files changed, 8 insertions, 8 deletions
diff --git a/miasm2/arch/arm/ira.py b/miasm2/arch/arm/ira.py index 8d659b58..7f5e8f1b 100644 --- a/miasm2/arch/arm/ira.py +++ b/miasm2/arch/arm/ira.py @@ -1,7 +1,7 @@ #-*- coding:utf-8 -*- from miasm2.expression.expression import * -from miasm2.ir.ir import ir, irbloc, AssignBlock +from miasm2.ir.ir import IRBlock, AssignBlock from miasm2.ir.analysis import ira from miasm2.arch.arm.sem import ir_arml, ir_armtl, ir_armb, ir_armtb from miasm2.arch.arm.regs import * diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py index 742032e6..0ec02907 100644 --- a/miasm2/arch/arm/sem.py +++ b/miasm2/arch/arm/sem.py @@ -1,5 +1,5 @@ from miasm2.expression.expression import * -from miasm2.ir.ir import ir, IRBlock +from miasm2.ir.ir import IntermediateRepresentation, IRBlock from miasm2.arch.arm.arch import mn_arm, mn_armt from miasm2.arch.arm.regs import * @@ -1227,9 +1227,9 @@ class arminfo: # offset -class ir_arml(ir): +class ir_arml(IntermediateRepresentation): def __init__(self, symbol_pool=None): - ir.__init__(self, mn_arm, "l", symbol_pool) + IntermediateRepresentation.__init__(self, mn_arm, "l", symbol_pool) self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) @@ -1264,14 +1264,14 @@ class ir_arml(ir): class ir_armb(ir_arml): def __init__(self, symbol_pool=None): - ir.__init__(self, mn_arm, "b", symbol_pool) + IntermediateRepresentation.__init__(self, mn_arm, "b", symbol_pool) self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) -class ir_armtl(ir): +class ir_armtl(IntermediateRepresentation): def __init__(self, symbol_pool=None): - ir.__init__(self, mn_armt, "l", symbol_pool) + IntermediateRepresentation.__init__(self, mn_armt, "l", symbol_pool) self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) @@ -1281,7 +1281,7 @@ class ir_armtl(ir): class ir_armtb(ir_armtl): def __init__(self, symbol_pool=None): - ir.__init__(self, mn_armt, "b", symbol_pool) + IntermediateRepresentation.__init__(self, mn_armt, "b", symbol_pool) self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) |