about summary refs log tree commit diff stats
path: root/miasm2/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'miasm2/arch/arm')
-rw-r--r--miasm2/arch/arm/arch.py76
-rw-r--r--miasm2/arch/arm/regs.py2
-rw-r--r--miasm2/arch/arm/sem.py88
3 files changed, 83 insertions, 83 deletions
diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py
index 54a168af..0d10d6f8 100644
--- a/miasm2/arch/arm/arch.py
+++ b/miasm2/arch/arm/arch.py
@@ -103,14 +103,14 @@ CIRCUNFLEX = Literal("^")
 
 def check_bounds(left_bound, right_bound, value):
     if left_bound <= value and value <= right_bound:
-        return ExprInt32(value)
+        return ExprInt(value, 32)
     else:
         raise ValueError('shift operator immediate value out of bound')
 
 
 def check_values(values, value):
     if value in values:
-        return ExprInt32(value)
+        return ExprInt(value, 32)
     else:
         raise ValueError('shift operator immediate value out of bound')
 
@@ -184,7 +184,7 @@ def ast_id2expr(t):
 
 
 def ast_int2expr(a):
-    return ExprInt32(a)
+    return ExprInt(a, 32)
 
 
 my_var_parser = ParseAst(ast_id2expr, ast_int2expr)
@@ -208,13 +208,13 @@ rot2_expr = (gpregs.parser + Optional(
 def deref2expr_nooff(s, l, t):
     t = t[0]
     # XXX default
-    return ExprOp("preinc", t[0], ExprInt32(0))
+    return ExprOp("preinc", t[0], ExprInt(0, 32))
 
 
 def deref2expr_pre(s, l, t):
     t = t[0]
     if len(t) == 1:
-        return ExprOp("preinc", t[0], ExprInt32(0))
+        return ExprOp("preinc", t[0], ExprInt(0, 32))
     elif len(t) == 2:
         return ExprOp("preinc", t[0], t[1])
     else:
@@ -224,7 +224,7 @@ def deref2expr_pre(s, l, t):
 def deref2expr_pre_mem(s, l, t):
     t = t[0]
     if len(t) == 1:
-        return ExprMem(ExprOp("preinc", t[0], ExprInt32(0)))
+        return ExprMem(ExprOp("preinc", t[0], ExprInt(0, 32)))
     elif len(t) == 2:
         return ExprMem(ExprOp("preinc", t[0], t[1]))
     else:
@@ -425,7 +425,7 @@ class instruction_arm(instruction):
         off = e.arg - self.offset
         if int(off % 4):
             raise ValueError('strange offset! %r' % off)
-        self.args[0] = ExprInt32(off)
+        self.args[0] = ExprInt(off, 32)
 
     def get_args_expr(self):
         args = [a for a in self.args]
@@ -500,7 +500,7 @@ class instruction_armt(instruction_arm):
         off = e.arg - self.offset
         if int(off % 2):
             raise ValueError('strange offset! %r' % off)
-        self.args[0] = ExprInt32(off)
+        self.args[0] = ExprInt(off, 32)
 
     def get_asm_offset(self, expr):
         # ADR XXX, PC, imm => PC is 4 aligned + imm
@@ -824,7 +824,7 @@ class arm_offs(arm_imm):
         if (1 << (self.l - 1)) & v:
             v |= ~0 ^ self.lmask
         v = self.decodeval(v)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -844,9 +844,9 @@ class arm_imm8_12(m_arg):
     def decode(self, v):
         v = v & self.lmask
         if self.parent.updown.value:
-            e = ExprInt32(v << 2)
+            e = ExprInt(v << 2, 32)
         else:
-            e = ExprInt32(-v << 2)
+            e = ExprInt(-v << 2, 32)
         if self.parent.ppi.value:
             e = ExprOp('preinc', self.parent.rn.expr, e)
         else:
@@ -900,7 +900,7 @@ class arm_imm_4_12(m_arg):
     def decode(self, v):
         v = v & self.lmask
         imm = (self.parent.imm4.value << 12) | v
-        self.expr = ExprInt32(imm)
+        self.expr = ExprInt(imm, 32)
         return True
 
     def encode(self):
@@ -920,7 +920,7 @@ class arm_imm_12_4(m_arg):
     def decode(self, v):
         v = v & self.lmask
         imm =  (self.parent.imm.value << 4) | v
-        self.expr = ExprInt32(imm)
+        self.expr = ExprInt(imm, 32)
         return True
 
     def encode(self):
@@ -952,7 +952,7 @@ class arm_op2(m_arg):
             rot = val >> 8
             imm = val & 0xff
             imm = myror32(imm, rot * 2)
-            self.expr = ExprInt32(imm)
+            self.expr = ExprInt(imm, 32)
             return True
         rm = val & 0xf
         shift = val >> 4
@@ -974,9 +974,9 @@ class arm_op2(m_arg):
         else:
             # shift kind is imm
             amount = shift
-            shift_op = ExprInt32(amount)
+            shift_op = ExprInt(amount, 32)
         a = regs_expr[rm]
-        if shift_op == ExprInt32(0):
+        if shift_op == ExprInt(0, 32):
             if shift_type == 3:
                 self.expr = ExprOp(allshifts[4], a)
             else:
@@ -1049,9 +1049,9 @@ class arm_op2imm(arm_imm8_12):
             if self.parent.updown.value == 0:
                 imm = -imm
             if self.parent.ppi.value:
-                e = ExprOp('preinc', self.parent.rn.expr, ExprInt32(imm))
+                e = ExprOp('preinc', self.parent.rn.expr, ExprInt(imm, 32))
             else:
-                e = ExprOp('postinc', self.parent.rn.expr, ExprInt32(imm))
+                e = ExprOp('postinc', self.parent.rn.expr, ExprInt(imm, 32))
             if self.parent.wback.value == 1:
                 e = ExprOp('wback', e)
             self.expr = ExprMem(e)
@@ -1069,9 +1069,9 @@ class arm_op2imm(arm_imm8_12):
         else:
             # shift kind is imm
             amount = shift
-            shift_op = ExprInt32(amount)
+            shift_op = ExprInt(amount, 32)
         a = regs_expr[rm]
-        if shift_op == ExprInt32(0):
+        if shift_op == ExprInt(0, 32):
             pass
         else:
             a = ExprOp(allshifts[shift_type], a, shift_op)
@@ -1249,7 +1249,7 @@ class arm_offs_blx(arm_imm):
         v = sign_ext(v, 26, 32)
         # Add pipeline offset
         v += 8
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -1359,7 +1359,7 @@ class arm_immed(m_arg):
 
     def decode(self, v):
         if self.parent.immop.value == 1:
-            imm = ExprInt32((self.parent.immedH.value << 4) | v)
+            imm = ExprInt((self.parent.immedH.value << 4) | v, 32)
         else:
             imm = gpregs.expr[v]
         if self.parent.updown.value == 0:
@@ -1454,7 +1454,7 @@ class arm_mem_rn_imm(m_arg):
         value = self.parent.imm.value
         if self.parent.rw.value == 0:
             value = -value
-        imm = ExprInt32(value)
+        imm = ExprInt(value, 32)
         reg = gpregs.expr[v]
         if value:
             expr = ExprMem(reg + imm)
@@ -1622,7 +1622,7 @@ armop("isb", [bs8(0xF5), bs8(0x7F), bs8(0xF0), bs8(0x6F)])
 
 class arm_widthm1(arm_imm, m_arg):
     def decode(self, v):
-        self.expr = ExprInt32(v+1)
+        self.expr = ExprInt(v+1, 32)
         return True
 
     def encode(self):
@@ -1639,7 +1639,7 @@ class arm_rm_rot2(m_arg):
         expr = gpregs.expr[v]
         shift_value = self.parent.rot2.value
         if shift_value:
-            expr = ExprOp(allshifts[3], expr, ExprInt32(shift_value * 8))
+            expr = ExprOp(allshifts[3], expr, ExprInt(shift_value * 8, 32))
         self.expr = expr
         return True
     def encode(self):
@@ -1715,7 +1715,7 @@ class arm_offreg(m_arg):
         v = v & self.lmask
         v = self.decodeval(v)
         if v:
-            self.expr = self.off_reg + ExprInt32(v)
+            self.expr = self.off_reg + ExprInt(v, 32)
         else:
             self.expr = self.off_reg
 
@@ -1746,7 +1746,7 @@ class arm_offpc(arm_offreg):
         v = v & self.lmask
         v <<= 2
         if v:
-            self.expr = ExprMem(self.off_reg + ExprInt32(v))
+            self.expr = ExprMem(self.off_reg + ExprInt(v, 32))
         else:
             self.expr = ExprMem(self.off_reg)
 
@@ -1853,7 +1853,7 @@ class arm_offbw(imm_noarg):
         v = v & self.lmask
         if self.parent.trb.value == 0:
             v <<= 2
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -1874,7 +1874,7 @@ class arm_offh(imm_noarg):
     def decode(self, v):
         v = v & self.lmask
         v <<= 1
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -2177,7 +2177,7 @@ class armt_gpreg_rm_shift_off(arm_reg):
             shift = allshifts_armt[self.parent.stype.value]
         else:
             shift = allshifts_armt[4]
-        self.expr = ExprOp(shift, r, ExprInt32(i))
+        self.expr = ExprOp(shift, r, ExprInt(i, 32))
         return True
 
     def encode(self):
@@ -2219,26 +2219,26 @@ class armt2_imm12(arm_imm):
 
         # simple encoding
         if 0 <= v < 0x100:
-            self.expr = ExprInt32(v)
+            self.expr = ExprInt(v, 32)
             return True
         # 00XY00XY form
         if v >> 8 == 1:
             v &= 0xFF
-            self.expr = ExprInt32((v << 16) | v)
+            self.expr = ExprInt((v << 16) | v, 32)
             return True
         # XY00XY00 form
         if v >> 8 == 2:
             v &= 0xFF
-            self.expr = ExprInt32((v << 24) | (v << 8))
+            self.expr = ExprInt((v << 24) | (v << 8), 32)
             return True
         # XYXYXYXY
         if v >> 8 == 3:
             v &= 0xFF
-            self.expr = ExprInt32((v << 24) | (v << 16) | (v << 8) | v)
+            self.expr = ExprInt((v << 24) | (v << 16) | (v << 8) | v, 32)
             return True
         r = v >> 7
         v = v & 0xFF
-        self.expr = ExprInt32(myror32(v, r))
+        self.expr = ExprInt(myror32(v, r), 32)
         return True
 
     def encode(self):
@@ -2290,7 +2290,7 @@ class armt2_imm10l(arm_imm):
         v = (s << 24) | (i1 << 23) | (
             i2 << 22) | (imm10h << 12) | (imm10l << 2)
         v = sign_ext(v, 25, 32)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -2329,7 +2329,7 @@ class armt2_imm11l(arm_imm):
         v = (s << 24) | (i1 << 23) | (
             i2 << 22) | (imm10h << 12) | (imm11l << 1)
         v = sign_ext(v, 25, 32)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -2369,7 +2369,7 @@ class armt_imm5_1(arm_imm):
 
     def decode(self, v):
         v = sign_ext(((self.parent.imm1.value << 5) | v) << 1, 7, 32)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
diff --git a/miasm2/arch/arm/regs.py b/miasm2/arch/arm/regs.py
index a44878a8..69488cb5 100644
--- a/miasm2/arch/arm/regs.py
+++ b/miasm2/arch/arm/regs.py
@@ -78,7 +78,7 @@ all_regs_ids_init = [R0_init, R1_init, R2_init, R3_init,
                      R8_init, R9_init, R10_init, R11_init,
                      R12_init, SP_init, LR_init, PC_init,
                      zf_init, nf_init, of_init, cf_init,
-                     ExprInt32(0), ExprInt32(0)
+                     ExprInt(0, 32), ExprInt(0, 32)
                      ]
 
 regs_init = {}
diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py
index 8c74aa76..710cdc9f 100644
--- a/miasm2/arch/arm/sem.py
+++ b/miasm2/arch/arm/sem.py
@@ -13,7 +13,7 @@ EXCEPT_PRIV_INSN = (1 << 17)
 
 
 def update_flag_zf(a):
-    return [ExprAff(zf, ExprCond(a, ExprInt1(0), ExprInt1(1)))]
+    return [ExprAff(zf, ExprCond(a, ExprInt(0, 1), ExprInt(1, 1)))]
 
 
 def update_flag_nf(a):
@@ -31,7 +31,7 @@ def update_flag_logic(a):
     e = []
     e += update_flag_zn(a)
     # XXX TODO: set cf if ROT imm in argument
-    #e.append(ExprAff(cf, ExprInt1(0)))
+    #e.append(ExprAff(cf, ExprInt(0, 1)))
     return e
 
 
@@ -68,7 +68,7 @@ def update_flag_add_of(op1, op2, res):
 def update_flag_sub_cf(op1, op2, res):
     "Compote CF in @res = @op1 - @op2"
     return ExprAff(cf,
-        ((((op1 ^ op2) ^ res) ^ ((op1 ^ res) & (op1 ^ op2))).msb()) ^ ExprInt1(1))
+        ((((op1 ^ op2) ^ res) ^ ((op1 ^ res) & (op1 ^ op2))).msb()) ^ ExprInt(1, 1))
 
 
 def update_flag_sub_of(op1, op2, res):
@@ -227,7 +227,7 @@ def sbc(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = (b + cf.zeroExtend(32)) - (c + ExprInt32(1))
+    r = (b + cf.zeroExtend(32)) - (c + ExprInt(1, 32))
     e.append(ExprAff(a, r))
     dst = get_dst(a)
     if dst is not None:
@@ -239,7 +239,7 @@ def sbcs(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = (b + cf.zeroExtend(32)) - (c + ExprInt32(1))
+    r = (b + cf.zeroExtend(32)) - (c + ExprInt(1, 32))
     e += update_flag_arith(r)
     e += update_flag_sub(b, c, r)
     e.append(ExprAff(a, r))
@@ -253,7 +253,7 @@ def rsc(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = (c + cf.zeroExtend(32)) - (b + ExprInt32(1))
+    r = (c + cf.zeroExtend(32)) - (b + ExprInt(1, 32))
     e.append(ExprAff(a, r))
     dst = get_dst(a)
     if dst is not None:
@@ -265,7 +265,7 @@ def rscs(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = (c + cf.zeroExtend(32)) - (b + ExprInt32(1))
+    r = (c + cf.zeroExtend(32)) - (b + ExprInt(1, 32))
     e.append(ExprAff(a, r))
     e += update_flag_arith(r)
     e += update_flag_sub(c, b, r)
@@ -348,7 +348,7 @@ def mov(ir, instr, a, b):
 
 
 def movt(ir, instr, a, b):
-    r = a | b << ExprInt32(16)
+    r = a | b << ExprInt(16, 32)
     e = [ExprAff(a, r)]
     dst = get_dst(a)
     if dst is not None:
@@ -368,7 +368,7 @@ def movs(ir, instr, a, b):
 
 
 def mvn(ir, instr, a, b):
-    r = b ^ ExprInt32(-1)
+    r = b ^ ExprInt(-1, 32)
     e = [ExprAff(a, r)]
     dst = get_dst(a)
     if dst is not None:
@@ -378,7 +378,7 @@ def mvn(ir, instr, a, b):
 
 def mvns(ir, instr, a, b):
     e = []
-    r = b ^ ExprInt32(-1)
+    r = b ^ ExprInt(-1, 32)
     e.append(ExprAff(a, r))
     # XXX TODO check
     e += update_flag_logic(r)
@@ -405,7 +405,7 @@ def bic(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = b & (c ^ ExprInt(uint32(-1)))
+    r = b & (c ^ ExprInt(-1, 32))
     e.append(ExprAff(a, r))
     dst = get_dst(a)
     if dst is not None:
@@ -417,7 +417,7 @@ def bics(ir, instr, a, b, c=None):
     e = []
     if c is None:
         b, c = a, b
-    r = b & (c ^ ExprInt(uint32(-1)))
+    r = b & (c ^ ExprInt(-1, 32))
     e += update_flag_logic(r)
     e.append(ExprAff(a, r))
     dst = get_dst(a)
@@ -512,7 +512,7 @@ def b(ir, instr, a):
 
 def bl(ir, instr, a):
     e = []
-    l = ExprInt32(instr.offset + instr.l)
+    l = ExprInt(instr.offset + instr.l, 32)
     e.append(ExprAff(PC, a))
     e.append(ExprAff(ir.IRDst, a))
     e.append(ExprAff(LR, l))
@@ -528,7 +528,7 @@ def bx(ir, instr, a):
 
 def blx(ir, instr, a):
     e = []
-    l = ExprInt32(instr.offset + instr.l)
+    l = ExprInt(instr.offset + instr.l, 32)
     e.append(ExprAff(PC, a))
     e.append(ExprAff(ir.IRDst, a))
     e.append(ExprAff(LR, l))
@@ -549,9 +549,9 @@ def st_ld_r(ir, instr, a, b, store=False, size=32, s_ext=False, z_ext=False):
             postinc = True
     if isinstance(b, ExprOp) and b.op in ["postinc", 'preinc']:
         # XXX TODO CHECK
-        base, off = b.args[0],  b.args[1]  # ExprInt32(size/8)
+        base, off = b.args[0],  b.args[1]  # ExprInt(size/8, 32)
     else:
-        base, off = b, ExprInt32(0)
+        base, off = b, ExprInt(0, 32)
     # print a, wb, base, off, postinc
     if postinc:
         ad = base
@@ -584,14 +584,14 @@ def st_ld_r(ir, instr, a, b, store=False, size=32, s_ext=False, z_ext=False):
     if store:
         e.append(ExprAff(m, a))
         if dmem:
-            e.append(ExprAff(ExprMem(ad + ExprInt32(4), size=size), a2))
+            e.append(ExprAff(ExprMem(ad + ExprInt(4, 32), size=size), a2))
     else:
         if a == PC:
             dst = PC
             e.append(ExprAff(ir.IRDst, m))
         e.append(ExprAff(a, m))
         if dmem:
-            e.append(ExprAff(a2, ExprMem(ad + ExprInt32(4), size=size)))
+            e.append(ExprAff(a2, ExprMem(ad + ExprInt(4, 32), size=size)))
 
     # XXX TODO check multiple write cause by wb
     if wb or postinc:
@@ -668,9 +668,9 @@ def st_ld_m(ir, instr, a, b, store=False, postinc=False, updown=False):
     if postinc:
         pass
     else:
-        base += ExprInt32(step)
+        base += ExprInt(step, 32)
     for i, r in enumerate(regs):
-        ad = base + ExprInt32(i * step)
+        ad = base + ExprInt(i * step, 32)
         if store:
             e.append(ExprAff(ExprMem(ad), r))
         else:
@@ -680,9 +680,9 @@ def st_ld_m(ir, instr, a, b, store=False, postinc=False, updown=False):
     # XXX TODO check multiple write cause by wb
     if wb:
         if postinc:
-            e.append(ExprAff(a, base + ExprInt32(len(regs) * step)))
+            e.append(ExprAff(a, base + ExprInt(len(regs) * step, 32)))
         else:
-            e.append(ExprAff(a, base + ExprInt32((len(regs) - 1) * step)))
+            e.append(ExprAff(a, base + ExprInt((len(regs) - 1) * step, 32)))
     if store:
         pass
     else:
@@ -726,7 +726,7 @@ def stmdb(ir, instr, a, b):
 def svc(ir, instr, a):
     # XXX TODO implement
     e = [
-        ExprAff(exception_flags, ExprInt32(EXCEPT_PRIV_INSN))]
+        ExprAff(exception_flags, ExprInt(EXCEPT_PRIV_INSN, 32))]
     return e
 
 
@@ -812,9 +812,9 @@ def push(ir, instr, a):
     e = []
     regs = list(a.args)
     for i in xrange(len(regs)):
-        r = SP + ExprInt32(-4 * (i + 1))
+        r = SP + ExprInt(-4 * (i + 1), 32)
         e.append(ExprAff(ExprMem(r), regs[i]))
-    r = SP + ExprInt32(-4 * len(regs))
+    r = SP + ExprInt(-4 * len(regs), 32)
     e.append(ExprAff(SP, r))
     return e
 
@@ -824,11 +824,11 @@ def pop(ir, instr, a):
     regs = list(a.args)
     dst = None
     for i in xrange(len(regs)):
-        r = SP + ExprInt32(4 * i)
+        r = SP + ExprInt(4 * i, 32)
         e.append(ExprAff(regs[i], ExprMem(r)))
         if regs[i] == ir.pc:
             dst = ExprMem(r)
-    r = SP + ExprInt32(4 * len(regs))
+    r = SP + ExprInt(4 * len(regs), 32)
     e.append(ExprAff(SP, r))
     if dst is not None:
         e.append(ExprAff(ir.IRDst, dst))
@@ -913,7 +913,7 @@ def bfc(ir, instr, a, b, c):
         out.append(a[:start])
         last = start
     if stop - start:
-        out.append(ExprInt32(0)[last:stop])
+        out.append(ExprInt(0, 32)[last:stop])
         last = stop
     if last < 32:
         out.append(a[last:])
@@ -942,13 +942,13 @@ def clz(ir, instr, a, b):
 
 def uxtab(ir, instr, a, b, c):
     e = []
-    e.append(ExprAff(a, b + (c & ExprInt32(0xff))))
+    e.append(ExprAff(a, b + (c & ExprInt(0xff, 32))))
     return e
 
 
 def bkpt(ir, instr, a):
     e = []
-    e.append(ExprAff(exception_flags, ExprInt32(EXCEPT_SOFT_BP)))
+    e.append(ExprAff(exception_flags, ExprInt(EXCEPT_SOFT_BP, 32)))
     e.append(ExprAff(bp_num, a))
     return e
 
@@ -1003,26 +1003,26 @@ cond_dct = {
 
 
 tab_cond = {COND_EQ: zf,
-            COND_NE: ExprCond(zf, ExprInt1(0), ExprInt1(1)),
+            COND_NE: ExprCond(zf, ExprInt(0, 1), ExprInt(1, 1)),
             COND_CS: cf,
-            COND_CC: ExprCond(cf, ExprInt1(0), ExprInt1(1)),
+            COND_CC: ExprCond(cf, ExprInt(0, 1), ExprInt(1, 1)),
             COND_MI: nf,
-            COND_PL: ExprCond(nf, ExprInt1(0), ExprInt1(1)),
+            COND_PL: ExprCond(nf, ExprInt(0, 1), ExprInt(1, 1)),
             COND_VS: of,
-            COND_VC: ExprCond(of, ExprInt1(0), ExprInt1(1)),
-            COND_HI: cf & ExprCond(zf, ExprInt1(0), ExprInt1(1)),
+            COND_VC: ExprCond(of, ExprInt(0, 1), ExprInt(1, 1)),
+            COND_HI: cf & ExprCond(zf, ExprInt(0, 1), ExprInt(1, 1)),
             # COND_HI: cf,
             # COND_HI: ExprOp('==',
             #                ExprOp('|', cf, zf),
-            #                ExprInt1(0)),
-            COND_LS: ExprCond(cf, ExprInt1(0), ExprInt1(1)) | zf,
-            COND_GE: ExprCond(nf - of, ExprInt1(0), ExprInt1(1)),
+            #                ExprInt(0, 1)),
+            COND_LS: ExprCond(cf, ExprInt(0, 1), ExprInt(1, 1)) | zf,
+            COND_GE: ExprCond(nf - of, ExprInt(0, 1), ExprInt(1, 1)),
             COND_LT: nf ^ of,
             # COND_GT: ExprOp('|',
-            #                ExprOp('==', zf, ExprInt1(0)) & (nf | of),
-            # ExprOp('==', nf, ExprInt1(0)) & ExprOp('==', of, ExprInt1(0))),
-            COND_GT: (ExprCond(zf, ExprInt1(0), ExprInt1(1)) &
-                      ExprCond(nf - of, ExprInt1(0), ExprInt1(1))),
+            #                ExprOp('==', zf, ExprInt(0, 1)) & (nf | of),
+            # ExprOp('==', nf, ExprInt(0, 1)) & ExprOp('==', of, ExprInt(0, 1))),
+            COND_GT: (ExprCond(zf, ExprInt(0, 1), ExprInt(1, 1)) &
+                      ExprCond(nf - of, ExprInt(0, 1), ExprInt(1, 1))),
             COND_LE: zf | (nf ^ of),
             }
 
@@ -1250,13 +1250,13 @@ class ir_arml(IntermediateRepresentation):
         #    return instr_ir, extra_ir
         for i, x in enumerate(instr_ir):
             x = ExprAff(x.dst, x.src.replace_expr(
-                {self.pc: ExprInt32(instr.offset + 8)}))
+                {self.pc: ExprInt(instr.offset + 8, 32)}))
             instr_ir[i] = x
         for irblock in extra_ir:
             for irs in irblock.irs:
                 for i, x in enumerate(irs):
                     x = ExprAff(x.dst, x.src.replace_expr(
-                        {self.pc: ExprInt32(instr.offset + 8)}))
+                        {self.pc: ExprInt(instr.offset + 8, 32)}))
                     irs[i] = x
         # return out_ir, extra_ir
         return instr_ir, extra_ir