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-rw-r--r--miasm2/arch/mips32/ira.py28
1 files changed, 12 insertions, 16 deletions
diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py
index 7aefad32..3caa8b12 100644
--- a/miasm2/arch/mips32/ira.py
+++ b/miasm2/arch/mips32/ira.py
@@ -4,19 +4,14 @@ from miasm2.expression.expression import ExprAff, ExprInt, ExprId
 from miasm2.ir.ir import IntermediateRepresentation, IRBlock, AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b
-from miasm2.core.asmblock import expr_is_int_or_label, expr_is_label
 
 class ir_a_mips32l(ir_mips32l, ira):
-    def __init__(self, symbol_pool=None):
-        ir_mips32l.__init__(self, symbol_pool)
+    def __init__(self, loc_db=None):
+        ir_mips32l.__init__(self, loc_db)
         self.ret_reg = self.arch.regs.V0
 
-    def pre_add_instr(self, block, instr, assignments, ir_blocks_all, gen_pc_updt):
-        # Avoid adding side effects, already done in post_add_bloc
-        return False
-
-    def post_add_block(self, block, ir_blocks):
-        IntermediateRepresentation.post_add_block(self, block, ir_blocks)
+    def post_add_asmblock_to_ircfg(self, block, ircfg, ir_blocks):
+        IntermediateRepresentation.post_add_asmblock_to_ircfg(self, block, ircfg, ir_blocks)
         new_irblocks = []
         for irb in ir_blocks:
             pc_val = None
@@ -28,14 +23,15 @@ class ir_a_mips32l(ir_mips32l, ira):
             if pc_val is None or lr_val is None:
                 new_irblocks.append(irb)
                 continue
-            if not expr_is_int_or_label(lr_val):
-                new_irblocks.append(irb)
+            if lr_val.is_loc():
+                offset = self.loc_db.get_location_offset(lr_val.loc_key)
+                if offset is not None:
+                    lr_val = ExprInt(offset, 32)
+            if not lr_val.is_int():
                 continue
-            if expr_is_label(lr_val):
-                lr_val = ExprInt(lr_val.name.offset, 32)
 
             instr = block.lines[-2]
-            if lr_val.arg != instr.offset + 8:
+            if int(lr_val) != instr.offset + 8:
                 raise ValueError("Wrong arg")
 
             # CALL
@@ -70,6 +66,6 @@ class ir_a_mips32l(ir_mips32l, ira):
 
 
 class ir_a_mips32b(ir_mips32b, ir_a_mips32l):
-    def __init__(self, symbol_pool=None):
-        ir_mips32b.__init__(self, symbol_pool)
+    def __init__(self, loc_db=None):
+        ir_mips32b.__init__(self, loc_db)
         self.ret_reg = self.arch.regs.V0