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-rw-r--r--miasm2/arch/mips32/arch.py24
-rw-r--r--miasm2/arch/mips32/ira.py10
-rw-r--r--miasm2/arch/mips32/jit.py8
-rw-r--r--miasm2/arch/mips32/sem.py12
4 files changed, 27 insertions, 27 deletions
diff --git a/miasm2/arch/mips32/arch.py b/miasm2/arch/mips32/arch.py
index 1502cde4..a47c606b 100644
--- a/miasm2/arch/mips32/arch.py
+++ b/miasm2/arch/mips32/arch.py
@@ -60,12 +60,12 @@ class instruction_mips32(cpu.instruction):
 
 
     @staticmethod
-    def arg2str(expr, index=None, symbol_pool=None):
+    def arg2str(expr, index=None, loc_db=None):
         if expr.is_id() or expr.is_int():
             return str(expr)
         elif expr.is_loc():
-            if symbol_pool is not None:
-                return symbol_pool.str_loc_key(expr.loc_key)
+            if loc_db is not None:
+                return loc_db.str_loc_key(expr.loc_key)
             else:
                 return str(expr)
         assert(isinstance(expr, ExprMem))
@@ -93,11 +93,11 @@ class instruction_mips32(cpu.instruction):
             raise NotImplementedError("TODO %s"%self)
         return i
 
-    def dstflow2label(self, symbol_pool):
+    def dstflow2label(self, loc_db):
         if self.name in ["J", 'JAL']:
             expr = self.args[0].arg
             addr = (self.offset & (0xFFFFFFFF ^ ((1<< 28)-1))) + expr
-            loc_key = symbol_pool.getby_offset_create(addr)
+            loc_key = loc_db.getby_offset_create(addr)
             self.args[0] = ExprLoc(loc_key, expr.size)
             return
 
@@ -107,7 +107,7 @@ class instruction_mips32(cpu.instruction):
         if not isinstance(expr, ExprInt):
             return
         addr = expr.arg + self.offset
-        loc_key = symbol_pool.getby_offset_create(addr)
+        loc_key = loc_db.getby_offset_create(addr)
         self.args[ndx] = ExprLoc(loc_key, expr.size)
 
     def breakflow(self):
@@ -122,7 +122,7 @@ class instruction_mips32(cpu.instruction):
             return True
         return False
 
-    def getdstflow(self, symbol_pool):
+    def getdstflow(self, loc_db):
         if self.name in br_0:
             return [self.args[0]]
         elif self.name in br_1:
@@ -147,7 +147,7 @@ class instruction_mips32(cpu.instruction):
             return True
         return False
 
-    def get_symbol_size(self, symbol, symbol_pool):
+    def get_symbol_size(self, symbol, loc_db):
         return 32
 
     def fixDstOffset(self):
@@ -259,23 +259,23 @@ def mips32op(name, fields, args=None, alias=False):
     #type(name, (mn_mips32b,), dct)
 
 class mips32_arg(cpu.m_arg):
-    def asm_ast_to_expr(self, arg, symbol_pool):
+    def asm_ast_to_expr(self, arg, loc_db):
         if isinstance(arg, AstId):
             if isinstance(arg.name, ExprId):
                 return arg.name
             if arg.name in gpregs.str:
                 return None
-            loc_key = symbol_pool.getby_name_create(arg.name)
+            loc_key = loc_db.getby_name_create(arg.name)
             return ExprLoc(loc_key, 32)
         if isinstance(arg, AstOp):
-            args = [self.asm_ast_to_expr(tmp, symbol_pool) for tmp in arg.args]
+            args = [self.asm_ast_to_expr(tmp, loc_db) for tmp in arg.args]
             if None in args:
                 return None
             return ExprOp(arg.op, *args)
         if isinstance(arg, AstInt):
             return ExprInt(arg.value, 32)
         if isinstance(arg, AstMem):
-            ptr = self.asm_ast_to_expr(arg.ptr, symbol_pool)
+            ptr = self.asm_ast_to_expr(arg.ptr, loc_db)
             if ptr is None:
                 return None
             return ExprMem(ptr, arg.size)
diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py
index b6d92ee0..791e67bf 100644
--- a/miasm2/arch/mips32/ira.py
+++ b/miasm2/arch/mips32/ira.py
@@ -6,8 +6,8 @@ from miasm2.ir.analysis import ira
 from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b
 
 class ir_a_mips32l(ir_mips32l, ira):
-    def __init__(self, symbol_pool=None):
-        ir_mips32l.__init__(self, symbol_pool)
+    def __init__(self, loc_db=None):
+        ir_mips32l.__init__(self, loc_db)
         self.ret_reg = self.arch.regs.V0
 
     def pre_add_instr(self, block, instr, assignments, ir_blocks_all, gen_pc_updt):
@@ -28,7 +28,7 @@ class ir_a_mips32l(ir_mips32l, ira):
                 new_irblocks.append(irb)
                 continue
             if lr_val.is_loc():
-                offset = self.symbol_pool.loc_key_to_offset(lr_val.loc_key)
+                offset = self.loc_db.loc_key_to_offset(lr_val.loc_key)
                 if offset is not None:
                     lr_val = ExprInt(offset, 32)
             if not lr_val.is_int():
@@ -70,6 +70,6 @@ class ir_a_mips32l(ir_mips32l, ira):
 
 
 class ir_a_mips32b(ir_mips32b, ir_a_mips32l):
-    def __init__(self, symbol_pool=None):
-        ir_mips32b.__init__(self, symbol_pool)
+    def __init__(self, loc_db=None):
+        ir_mips32b.__init__(self, loc_db)
         self.ret_reg = self.arch.regs.V0
diff --git a/miasm2/arch/mips32/jit.py b/miasm2/arch/mips32/jit.py
index c637fb13..0c4eb85b 100644
--- a/miasm2/arch/mips32/jit.py
+++ b/miasm2/arch/mips32/jit.py
@@ -1,7 +1,7 @@
 import logging
 
 from miasm2.jitter.jitload import Jitter, named_arguments
-from miasm2.core import asmblock
+from miasm2.core.locationdb import LocationDB
 from miasm2.core.utils import pck32, upck32
 from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b
 from miasm2.jitter.codegen import CGen
@@ -70,7 +70,7 @@ class mipsCGen(CGen):
         """
 
         loc_key = self.get_block_post_label(block)
-        offset = self.ir_arch.symbol_pool.loc_key_to_offset(loc_key)
+        offset = self.ir_arch.loc_db.loc_key_to_offset(loc_key)
         out = (self.CODE_RETURN_NO_EXCEPTION % (loc_key,
                                                 self.C_PC,
                                                 m2_expr.ExprId('branch_dst_irdst', 32),
@@ -85,7 +85,7 @@ class jitter_mips32l(Jitter):
     C_Gen = mipsCGen
 
     def __init__(self, *args, **kwargs):
-        sp = asmblock.AsmSymbolPool()
+        sp = LocationDB()
         Jitter.__init__(self, ir_mips32l(sp), *args, **kwargs)
         self.vm.set_little_endian()
 
@@ -145,6 +145,6 @@ class jitter_mips32l(Jitter):
 class jitter_mips32b(jitter_mips32l):
 
     def __init__(self, *args, **kwargs):
-        sp = asmblock.AsmSymbolPool()
+        sp = LocationDB()
         Jitter.__init__(self, ir_mips32b(sp), *args, **kwargs)
         self.vm.set_big_endian()
diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py
index fd4fa655..df13cd2c 100644
--- a/miasm2/arch/mips32/sem.py
+++ b/miasm2/arch/mips32/sem.py
@@ -469,8 +469,8 @@ def get_mnemo_expr(ir, instr, *args):
 
 class ir_mips32l(IntermediateRepresentation):
 
-    def __init__(self, symbol_pool=None):
-        IntermediateRepresentation.__init__(self, mn_mips32, 'l', symbol_pool)
+    def __init__(self, loc_db=None):
+        IntermediateRepresentation.__init__(self, mn_mips32, 'l', loc_db)
         self.pc = mn_mips32.getpc()
         self.sp = mn_mips32.getsp()
         self.IRDst = m2_expr.ExprId('IRDst', 32)
@@ -490,14 +490,14 @@ class ir_mips32l(IntermediateRepresentation):
         return instr_ir, new_extra_ir
 
     def get_next_instr(self, instr):
-        return self.symbol_pool.getby_offset_create(instr.offset  + 4)
+        return self.loc_db.getby_offset_create(instr.offset  + 4)
 
     def get_next_break_loc_key(self, instr):
-        return self.symbol_pool.getby_offset_create(instr.offset  + 8)
+        return self.loc_db.getby_offset_create(instr.offset  + 8)
 
 class ir_mips32b(ir_mips32l):
-    def __init__(self, symbol_pool=None):
-        IntermediateRepresentation.__init__(self, mn_mips32, 'b', symbol_pool)
+    def __init__(self, loc_db=None):
+        IntermediateRepresentation.__init__(self, mn_mips32, 'b', loc_db)
         self.pc = mn_mips32.getpc()
         self.sp = mn_mips32.getsp()
         self.IRDst = m2_expr.ExprId('IRDst', 32)