2 files changed, 6 insertions, 6 deletions
diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py
index 6efbf8ae..67c5f2dc 100644
--- a/miasm2/arch/mips32/ira.py
+++ b/miasm2/arch/mips32/ira.py
@@ -1,7 +1,7 @@
 #-*- coding:utf-8 -*-
 
 from miasm2.expression.expression import *
-from miasm2.ir.ir import ir, IRBlock, AssignBlock
+from miasm2.ir.ir import IntermediateRepresentation, IRBlock, AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b
 from miasm2.arch.mips32.regs import *
@@ -22,7 +22,7 @@ class ir_a_mips32l(ir_mips32l, ira):
         return irb_cur
 
     def post_add_bloc(self, bloc, ir_blocs):
-        ir.post_add_bloc(self, bloc, ir_blocs)
+        IntermediateRepresentation.post_add_bloc(self, bloc, ir_blocs)
         for irb in ir_blocs:
             pc_val = None
             lr_val = None
diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py
index 74ad4f3e..cf760307 100644
--- a/miasm2/arch/mips32/sem.py
+++ b/miasm2/arch/mips32/sem.py
@@ -1,5 +1,5 @@
 import miasm2.expression.expression as m2_expr
-from miasm2.ir.ir import ir, IRBlock
+from miasm2.ir.ir import IntermediateRepresentation, IRBlock
 from miasm2.arch.mips32.arch import mn_mips32
 from miasm2.arch.mips32.regs import R_LO, R_HI, PC, RA
 from miasm2.core.sembuilder import SemBuilder
@@ -429,10 +429,10 @@ def get_mnemo_expr(ir, instr, *args):
     instr, extra_ir = mnemo_func[instr.name.lower()](ir, instr, *args)
     return instr, extra_ir
 
-class ir_mips32l(ir):
+class ir_mips32l(IntermediateRepresentation):
 
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_mips32, 'l', symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_mips32, 'l', symbol_pool)
         self.pc = mn_mips32.getpc()
         self.sp = mn_mips32.getsp()
         self.IRDst = m2_expr.ExprId('IRDst', 32)
@@ -500,7 +500,7 @@ class ir_mips32l(ir):
 
 class ir_mips32b(ir_mips32l):
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_mips32, 'b', symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_mips32, 'b', symbol_pool)
         self.pc = mn_mips32.getpc()
         self.sp = mn_mips32.getsp()
         self.IRDst = m2_expr.ExprId('IRDst', 32)