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-rw-r--r--miasm2/arch/mips32/arch.py20
-rw-r--r--miasm2/arch/mips32/ira.py4
-rw-r--r--miasm2/arch/mips32/sem.py4
3 files changed, 14 insertions, 14 deletions
diff --git a/miasm2/arch/mips32/arch.py b/miasm2/arch/mips32/arch.py
index f11c6e3a..d64e27df 100644
--- a/miasm2/arch/mips32/arch.py
+++ b/miasm2/arch/mips32/arch.py
@@ -5,7 +5,7 @@ from collections import defaultdict
 
 from pyparsing import Literal, Group, Optional
 
-from miasm2.expression.expression import ExprMem, ExprInt, ExprInt32, ExprId
+from miasm2.expression.expression import ExprMem, ExprInt, ExprId
 from miasm2.core.bin_stream import bin_stream
 import miasm2.arch.mips32.regs as regs
 import miasm2.core.cpu as cpu
@@ -56,7 +56,7 @@ def ast_id2expr(t):
 
 
 def ast_int2expr(a):
-    return ExprInt32(a)
+    return ExprInt(a, 32)
 
 
 my_var_parser = cpu.ParseAst(ast_id2expr, ast_int2expr)
@@ -176,7 +176,7 @@ class instruction_mips32(cpu.instruction):
         off = e.arg - self.offset
         if int(off % 4):
             raise ValueError('strange offset! %r' % off)
-        self.args[ndx] = ExprInt32(off)
+        self.args[ndx] = ExprInt(off, 32)
 
     def get_args_expr(self):
         args = [a for a in self.args]
@@ -299,7 +299,7 @@ class mips32_s16imm_noarg(mips32_imm):
     def decode(self, v):
         v = v & self.lmask
         v = cpu.sign_ext(v, 16, 32)
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -319,7 +319,7 @@ class mips32_soff_noarg(mips32_imm):
         v <<= 2
         v = cpu.sign_ext(v, 16+2, 32)
         # Add pipeline offset
-        self.expr = ExprInt32(v + 4)
+        self.expr = ExprInt(v + 4, 32)
         return True
 
     def encode(self):
@@ -345,7 +345,7 @@ class mips32_soff(mips32_soff_noarg, cpu.m_arg):
 class mips32_instr_index(mips32_imm, cpu.m_arg):
     def decode(self, v):
         v = v & self.lmask
-        self.expr = ExprInt32(v<<2)
+        self.expr = ExprInt(v<<2, 32)
         return True
 
     def encode(self):
@@ -364,7 +364,7 @@ class mips32_instr_index(mips32_imm, cpu.m_arg):
 class mips32_u16imm(mips32_imm, cpu.m_arg):
     def decode(self, v):
         v = v & self.lmask
-        self.expr = ExprInt32(v)
+        self.expr = ExprInt(v, 32)
         return True
 
     def encode(self):
@@ -389,7 +389,7 @@ class mips32_dreg_imm(cpu.m_arg):
             return False
         arg = e.arg
         if isinstance(arg, ExprId):
-            self.parent.imm.expr = ExprInt32(0)
+            self.parent.imm.expr = ExprInt(0, 32)
             r = arg
         elif len(arg.args) == 2 and arg.op == "+":
             self.parent.imm.expr = arg.args[1]
@@ -411,7 +411,7 @@ class mips32_dreg_imm(cpu.m_arg):
 class mips32_esize(mips32_imm, cpu.m_arg):
     def decode(self, v):
         v = v & self.lmask
-        self.expr = ExprInt32(v+1)
+        self.expr = ExprInt(v+1, 32)
         return True
 
     def encode(self):
@@ -424,7 +424,7 @@ class mips32_esize(mips32_imm, cpu.m_arg):
 
 class mips32_eposh(mips32_imm, cpu.m_arg):
     def decode(self, v):
-        self.expr = ExprInt32(v-int(self.parent.epos.expr)+1)
+        self.expr = ExprInt(v-int(self.parent.epos.expr)+1, 32)
         return True
 
     def encode(self):
diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py
index dd02ff50..92af5cc5 100644
--- a/miasm2/arch/mips32/ira.py
+++ b/miasm2/arch/mips32/ira.py
@@ -1,6 +1,6 @@
 #-*- coding:utf-8 -*-
 
-from miasm2.expression.expression import ExprAff, ExprInt32, ExprId
+from miasm2.expression.expression import ExprAff, ExprInt, ExprId
 from miasm2.ir.ir import IntermediateRepresentation, IRBlock, AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b
@@ -29,7 +29,7 @@ class ir_a_mips32l(ir_mips32l, ira):
             if not expr_is_int_or_label(lr_val):
                 continue
             if expr_is_label(lr_val):
-                lr_val = ExprInt32(lr_val.name.offset)
+                lr_val = ExprInt(lr_val.name.offset, 32)
 
             line = block.lines[-2]
             if lr_val.arg != line.offset + 8:
diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py
index d982f033..bc050b38 100644
--- a/miasm2/arch/mips32/sem.py
+++ b/miasm2/arch/mips32/sem.py
@@ -443,13 +443,13 @@ class ir_mips32l(IntermediateRepresentation):
 
         for i, x in enumerate(instr_ir):
             x = m2_expr.ExprAff(x.dst, x.src.replace_expr(
-                {self.pc: m2_expr.ExprInt32(instr.offset + 4)}))
+                {self.pc: m2_expr.ExprInt(instr.offset + 4, 32)}))
             instr_ir[i] = x
         for irblock in extra_ir:
             for irs in irblock.irs:
                 for i, x in enumerate(irs):
                     x = m2_expr.ExprAff(x.dst, x.src.replace_expr(
-                        {self.pc: m2_expr.ExprInt32(instr.offset + 4)}))
+                        {self.pc: m2_expr.ExprInt(instr.offset + 4, 32)}))
                     irs[i] = x
         return instr_ir, extra_ir