diff options
Diffstat (limited to 'miasm2/arch/x86/jit.py')
| -rw-r--r-- | miasm2/arch/x86/jit.py | 61 |
1 files changed, 29 insertions, 32 deletions
diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py index 2e483f2a..cfdabf8c 100644 --- a/miasm2/arch/x86/jit.py +++ b/miasm2/arch/x86/jit.py @@ -1,8 +1,8 @@ import logging from miasm2.jitter.jitload import jitter, named_arguments -from miasm2.core import asmbloc -from miasm2.core.utils import * +from miasm2.core import asmblock +from miasm2.core.utils import pck16, pck32, pck64, upck16, upck32, upck64 from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 from miasm2.jitter.codegen import CGen @@ -37,28 +37,27 @@ class jitter_x86_16(jitter): C_Gen = x86_32_CGen def __init__(self, *args, **kwargs): - sp = asmbloc.asm_symbol_pool() + sp = asmblock.AsmSymbolPool() jitter.__init__(self, ir_x86_16(sp), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False self.orig_irbloc_fix_regs_for_mode = self.ir_arch.irbloc_fix_regs_for_mode self.ir_arch.irbloc_fix_regs_for_mode = self.ir_archbloc_fix_regs_for_mode - def ir_archbloc_fix_regs_for_mode(self, irbloc, attrib=64): - self.orig_irbloc_fix_regs_for_mode(irbloc, 64) + def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): + self.orig_irbloc_fix_regs_for_mode(irblock, 64) - def push_uint16_t(self, v): + def push_uint16_t(self, value): self.cpu.SP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.SP, pck16(v)) + self.vm.set_mem(self.cpu.SP, pck16(value)) def pop_uint16_t(self): - x = upck16(self.vm.get_mem(self.cpu.SP, self.ir_arch.sp.size / 8)) + value = upck16(self.vm.get_mem(self.cpu.SP, self.ir_arch.sp.size / 8)) self.cpu.SP += self.ir_arch.sp.size / 8 - return x + return value - def get_stack_arg(self, n): - x = upck16(self.vm.get_mem(self.cpu.SP + 4 * n, 4)) - return x + def get_stack_arg(self, index): + return upck16(self.vm.get_mem(self.cpu.SP + 4 * index, 4)) def init_run(self, *args, **kwargs): jitter.init_run(self, *args, **kwargs) @@ -70,7 +69,7 @@ class jitter_x86_32(jitter): C_Gen = x86_32_CGen def __init__(self, *args, **kwargs): - sp = asmbloc.asm_symbol_pool() + sp = asmblock.AsmSymbolPool() jitter.__init__(self, ir_x86_32(sp), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False @@ -78,21 +77,20 @@ class jitter_x86_32(jitter): self.orig_irbloc_fix_regs_for_mode = self.ir_arch.irbloc_fix_regs_for_mode self.ir_arch.irbloc_fix_regs_for_mode = self.ir_archbloc_fix_regs_for_mode - def ir_archbloc_fix_regs_for_mode(self, irbloc, attrib=64): - self.orig_irbloc_fix_regs_for_mode(irbloc, 64) + def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): + self.orig_irbloc_fix_regs_for_mode(irblock, 64) - def push_uint32_t(self, v): + def push_uint32_t(self, value): self.cpu.ESP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.ESP, pck32(v)) + self.vm.set_mem(self.cpu.ESP, pck32(value)) def pop_uint32_t(self): - x = upck32(self.vm.get_mem(self.cpu.ESP, self.ir_arch.sp.size / 8)) + value = upck32(self.vm.get_mem(self.cpu.ESP, self.ir_arch.sp.size / 8)) self.cpu.ESP += self.ir_arch.sp.size / 8 - return x + return value - def get_stack_arg(self, n): - x = upck32(self.vm.get_mem(self.cpu.ESP + 4 * n, 4)) - return x + def get_stack_arg(self, index): + return upck32(self.vm.get_mem(self.cpu.ESP + 4 * index, 4)) # calling conventions @@ -131,7 +129,7 @@ class jitter_x86_64(jitter): C_Gen = x86_64_CGen def __init__(self, *args, **kwargs): - sp = asmbloc.asm_symbol_pool() + sp = asmblock.AsmSymbolPool() jitter.__init__(self, ir_x86_64(sp), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False @@ -139,21 +137,20 @@ class jitter_x86_64(jitter): self.orig_irbloc_fix_regs_for_mode = self.ir_arch.irbloc_fix_regs_for_mode self.ir_arch.irbloc_fix_regs_for_mode = self.ir_archbloc_fix_regs_for_mode - def ir_archbloc_fix_regs_for_mode(self, irbloc, attrib=64): - self.orig_irbloc_fix_regs_for_mode(irbloc, 64) + def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): + self.orig_irbloc_fix_regs_for_mode(irblock, 64) - def push_uint64_t(self, v): + def push_uint64_t(self, value): self.cpu.RSP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.RSP, pck64(v)) + self.vm.set_mem(self.cpu.RSP, pck64(value)) def pop_uint64_t(self): - x = upck64(self.vm.get_mem(self.cpu.RSP, self.ir_arch.sp.size / 8)) + value = upck64(self.vm.get_mem(self.cpu.RSP, self.ir_arch.sp.size / 8)) self.cpu.RSP += self.ir_arch.sp.size / 8 - return x + return value - def get_stack_arg(self, n): - x = upck64(self.vm.get_mem(self.cpu.RSP + 8 * n, 8)) - return x + def get_stack_arg(self, index): + return upck64(self.vm.get_mem(self.cpu.RSP + 8 * index, 8)) @named_arguments def func_args_stdcall(self, n_args): |