diff options
Diffstat (limited to '')
| -rw-r--r-- | miasm2/arch/x86/ira.py | 28 | ||||
| -rw-r--r-- | miasm2/arch/x86/jit.py | 53 |
2 files changed, 38 insertions, 43 deletions
diff --git a/miasm2/arch/x86/ira.py b/miasm2/arch/x86/ira.py index 5b80f5d5..1ff4cbe8 100644 --- a/miasm2/arch/x86/ira.py +++ b/miasm2/arch/x86/ira.py @@ -1,8 +1,6 @@ #-*- coding:utf-8 -*- -from miasm2.expression.expression import ExprAff, ExprOp, ExprId -from miasm2.core.graph import DiGraph -from miasm2.core.asmbloc import expr_is_label +from miasm2.expression.expression import ExprAff, ExprOp from miasm2.ir.ir import AssignBlock from miasm2.ir.analysis import ira from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 @@ -15,21 +13,21 @@ class ir_a_x86_16(ir_x86_16, ira): self.ret_reg = self.arch.regs.AX # for test XXX TODO - def set_dead_regs(self, b): - b.rw[-1][1].add(self.arch.regs.zf) - b.rw[-1][1].add(self.arch.regs.of) - b.rw[-1][1].add(self.arch.regs.pf) - b.rw[-1][1].add(self.arch.regs.cf) - b.rw[-1][1].add(self.arch.regs.nf) - b.rw[-1][1].add(self.arch.regs.af) - - def get_out_regs(self, b): + def set_dead_regs(self, irblock): + irblock.rw[-1][1].add(self.arch.regs.zf) + irblock.rw[-1][1].add(self.arch.regs.of) + irblock.rw[-1][1].add(self.arch.regs.pf) + irblock.rw[-1][1].add(self.arch.regs.cf) + irblock.rw[-1][1].add(self.arch.regs.nf) + irblock.rw[-1][1].add(self.arch.regs.af) + + def get_out_regs(self, _): return set([self.ret_reg, self.sp]) def add_unused_regs(self): - leaves = [self.blocs[n] for n in self.g.leafs()] - for b in leaves: - self.set_dead_regs(b) + leaves = [self.blocs[label] for label in self.g.leafs()] + for irblock in leaves: + self.set_dead_regs(irblock) class ir_a_x86_32(ir_x86_32, ir_a_x86_16): diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py index 2e483f2a..d8a244b2 100644 --- a/miasm2/arch/x86/jit.py +++ b/miasm2/arch/x86/jit.py @@ -2,7 +2,7 @@ import logging from miasm2.jitter.jitload import jitter, named_arguments from miasm2.core import asmbloc -from miasm2.core.utils import * +from miasm2.core.utils import pck16, pck32, pck64, upck16, upck32, upck64 from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 from miasm2.jitter.codegen import CGen @@ -44,21 +44,20 @@ class jitter_x86_16(jitter): self.orig_irbloc_fix_regs_for_mode = self.ir_arch.irbloc_fix_regs_for_mode self.ir_arch.irbloc_fix_regs_for_mode = self.ir_archbloc_fix_regs_for_mode - def ir_archbloc_fix_regs_for_mode(self, irbloc, attrib=64): - self.orig_irbloc_fix_regs_for_mode(irbloc, 64) + def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): + self.orig_irbloc_fix_regs_for_mode(irblock, 64) - def push_uint16_t(self, v): + def push_uint16_t(self, value): self.cpu.SP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.SP, pck16(v)) + self.vm.set_mem(self.cpu.SP, pck16(value)) def pop_uint16_t(self): - x = upck16(self.vm.get_mem(self.cpu.SP, self.ir_arch.sp.size / 8)) + value = upck16(self.vm.get_mem(self.cpu.SP, self.ir_arch.sp.size / 8)) self.cpu.SP += self.ir_arch.sp.size / 8 - return x + return value - def get_stack_arg(self, n): - x = upck16(self.vm.get_mem(self.cpu.SP + 4 * n, 4)) - return x + def get_stack_arg(self, index): + return upck16(self.vm.get_mem(self.cpu.SP + 4 * index, 4)) def init_run(self, *args, **kwargs): jitter.init_run(self, *args, **kwargs) @@ -78,21 +77,20 @@ class jitter_x86_32(jitter): self.orig_irbloc_fix_regs_for_mode = self.ir_arch.irbloc_fix_regs_for_mode self.ir_arch.irbloc_fix_regs_for_mode = self.ir_archbloc_fix_regs_for_mode - def ir_archbloc_fix_regs_for_mode(self, irbloc, attrib=64): - self.orig_irbloc_fix_regs_for_mode(irbloc, 64) + def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): + self.orig_irbloc_fix_regs_for_mode(irblock, 64) - def push_uint32_t(self, v): + def push_uint32_t(self, value): self.cpu.ESP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.ESP, pck32(v)) + self.vm.set_mem(self.cpu.ESP, pck32(value)) def pop_uint32_t(self): - x = upck32(self.vm.get_mem(self.cpu.ESP, self.ir_arch.sp.size / 8)) + value = upck32(self.vm.get_mem(self.cpu.ESP, self.ir_arch.sp.size / 8)) self.cpu.ESP += self.ir_arch.sp.size / 8 - return x + return value - def get_stack_arg(self, n): - x = upck32(self.vm.get_mem(self.cpu.ESP + 4 * n, 4)) - return x + def get_stack_arg(self, index): + return upck32(self.vm.get_mem(self.cpu.ESP + 4 * index, 4)) # calling conventions @@ -139,21 +137,20 @@ class jitter_x86_64(jitter): self.orig_irbloc_fix_regs_for_mode = self.ir_arch.irbloc_fix_regs_for_mode self.ir_arch.irbloc_fix_regs_for_mode = self.ir_archbloc_fix_regs_for_mode - def ir_archbloc_fix_regs_for_mode(self, irbloc, attrib=64): - self.orig_irbloc_fix_regs_for_mode(irbloc, 64) + def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): + self.orig_irbloc_fix_regs_for_mode(irblock, 64) - def push_uint64_t(self, v): + def push_uint64_t(self, value): self.cpu.RSP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.RSP, pck64(v)) + self.vm.set_mem(self.cpu.RSP, pck64(value)) def pop_uint64_t(self): - x = upck64(self.vm.get_mem(self.cpu.RSP, self.ir_arch.sp.size / 8)) + value = upck64(self.vm.get_mem(self.cpu.RSP, self.ir_arch.sp.size / 8)) self.cpu.RSP += self.ir_arch.sp.size / 8 - return x + return value - def get_stack_arg(self, n): - x = upck64(self.vm.get_mem(self.cpu.RSP + 8 * n, 8)) - return x + def get_stack_arg(self, index): + return upck64(self.vm.get_mem(self.cpu.RSP + 8 * index, 8)) @named_arguments def func_args_stdcall(self, n_args): |