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-rw-r--r--miasm2/arch/x86/arch.py7
-rw-r--r--miasm2/arch/x86/sem.py8
2 files changed, 1 insertions, 14 deletions
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py
index 3e41d46e..2abd5bbc 100644
--- a/miasm2/arch/x86/arch.py
+++ b/miasm2/arch/x86/arch.py
@@ -939,7 +939,6 @@ class bs_modname_size(bs_divert):
                     osize = v_opmode_info(size, opmode, 1, 0)
                     nfields[i] = f
                     nfields = nfields[:-1]
-                    args = dict(self.args)
                     ndct = dict(dct)
                     if osize in self.args['name']:
                         ndct['name'] = self.args['name'][osize]
@@ -951,7 +950,6 @@ class bs_modname_size(bs_divert):
                     f = bs("0", l=0, cls=(bs_fbit,), fname="rex_w")
                     osize = v_opmode_info(size, opmode, 0, 0)
                     nfields[i] = f
-                    args = dict(self.args)
                     ndct = dict(dct)
                     if osize in self.args['name']:
                         ndct['name'] = self.args['name'][osize]
@@ -960,7 +958,6 @@ class bs_modname_size(bs_divert):
                 l = opmode_prefix((dct['mode'], dct['opmode'], dct['admode']))
                 osize = v_opmode_info(size, opmode, None, 0)
                 nfields = fields[:-1]
-                args = dict(self.args)
                 ndct = dict(dct)
                 if osize in self.args['name']:
                     ndct['name'] = self.args['name'][osize]
@@ -2897,9 +2894,7 @@ class bs_rel_off(bs_cond_imm):
         if not isinstance(self.expr, ExprInt):
             raise StopIteration
         arg0_expr = self.parent.args[0].expr
-        if self.l != 0:
-            l = self.l
-        else:
+        if self.l == 0:
             l = self.parent.v_opmode()
             self.l = l
         l = offsize(self.parent)
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py
index f07e2285..816608cb 100644
--- a/miasm2/arch/x86/sem.py
+++ b/miasm2/arch/x86/sem.py
@@ -1441,7 +1441,6 @@ def ret(ir, instr, src=None):
     myesp = mRSP[instr.mode][:size]
 
     if src is None:
-        src = m2_expr.ExprInt(0, size)
         value = (myesp + (m2_expr.ExprInt((size / 8), size)))
     else:
         src = m2_expr.ExprInt(int(src), size)
@@ -1490,7 +1489,6 @@ def retf(ir, instr, src=None):
 
 
 def leave(ir, instr):
-    opmode, admode = instr.v_opmode(), instr.v_admode()
     size = instr.mode
     myesp = mRSP[size]
     e = []
@@ -4427,7 +4425,6 @@ def pslldq(_, instr, dst, src):
 
 def psrldq(_, instr, dst, src):
     assert src.is_int()
-    e = []
     count = int(src)
     if count > 15:
         return [m2_expr.ExprAff(dst, m2_expr.ExprInt(0, dst.size))], []
@@ -4924,7 +4921,6 @@ def maskmovq(ir, instr, src, mask):
     # Build write blocks
     dst_addr = mRDI[instr.mode]
     for i, start in enumerate(xrange(0, mask.size, 8)):
-        bit = mask[start + 7: start + 8]
         cur_label = write_labels[i]
         next_check_label = check_labels[i + 1] if (i + 1) < len(check_labels) else loc_next_expr
         write_addr = dst_addr + m2_expr.ExprInt(i, dst_addr.size)
@@ -5664,13 +5660,9 @@ class ir_x86_16(IntermediateRepresentation):
             return instr_ir, extra_ir
 
         instr.additional_info.except_on_instr = True
-        # get instruction size
-        s = {"B": 8, "W": 16, "D": 32, 'Q': 64}[instr.name[-1]]
-        size = instr.v_opmode()
         admode = instr.v_admode()
         c_reg = mRCX[instr.mode][:admode]
 
-        out_ir = []
         zf_val = None
         # set if zf is tested (cmps, scas)
         for e in instr_ir:  # +[updt_c]: