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-rw-r--r--miasm2/arch/x86/arch.py5
-rw-r--r--miasm2/arch/x86/jit.py8
2 files changed, 10 insertions, 3 deletions
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py
index 77744ccd..11c1e00f 100644
--- a/miasm2/arch/x86/arch.py
+++ b/miasm2/arch/x86/arch.py
@@ -540,7 +540,10 @@ class instruction_x86(instruction):
         self.additional_info.prefixed = getattr(c, "prefixed", "")
 
     def __str__(self):
-        o = super(instruction_x86, self).__str__()
+        return self.to_string()
+      
+    def to_string(self, loc_db=None):
+        o = super(instruction_x86, self).to_string(loc_db)
         if self.additional_info.g1.value & 1:
             o = "LOCK %s" % o
         if self.additional_info.g1.value & 2:
diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py
index d775cff5..f0a9875e 100644
--- a/miasm2/arch/x86/jit.py
+++ b/miasm2/arch/x86/jit.py
@@ -20,16 +20,20 @@ class x86_32_CGen(CGen):
         self.translator = TranslatorC(self.ir_arch.loc_db)
         self.init_arch_C()
 
-    def gen_post_code(self, attrib):
+    def gen_post_code(self, attrib, pc_value):
         out = []
         if attrib.log_regs:
+            # Update PC for dump_gpregs
+            out.append("%s = %s;" % (self.C_PC, pc_value))
             out.append('dump_gpregs_32(jitcpu->cpu);')
         return out
 
 class x86_64_CGen(x86_32_CGen):
-    def gen_post_code(self, attrib):
+    def gen_post_code(self, attrib, pc_value):
         out = []
         if attrib.log_regs:
+            # Update PC for dump_gpregs
+            out.append("%s = %s;" % (self.C_PC, pc_value))
             out.append('dump_gpregs_64(jitcpu->cpu);')
         return out